[tip: perf/core] perf vendor events arm64: Add some missing events for Hisi hip08 HHA PMU

From: tip-bot2 for John Garry
Date: Mon Oct 21 2019 - 20:04:22 EST


The following commit has been merged into the perf/core branch of tip:

Commit-ID: 2b7847158120136c4b23684c768a82d571ee59bf
Gitweb: https://git.kernel.org/tip/2b7847158120136c4b23684c768a82d571ee59bf
Author: John Garry <john.garry@xxxxxxxxxx>
AuthorDate: Wed, 04 Sep 2019 23:54:44 +08:00
Committer: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
CommitterDate: Tue, 15 Oct 2019 13:03:58 -03:00

perf vendor events arm64: Add some missing events for Hisi hip08 HHA PMU

Add some more missing events.

A trivial typo is also fixed.

Signed-off-by: John Garry <john.garry@xxxxxxxxxx>
Reviewed-by: Shaokun Zhang <zhangshaokun@xxxxxxxxxxxxx>
Cc: Alexander Shishkin <alexander.shishkin@xxxxxxxxxxxxxxx>
Cc: Jiri Olsa <jolsa@xxxxxxxxxx>
Cc: Mark Rutland <mark.rutland@xxxxxxx>
Cc: Namhyung Kim <namhyung@xxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: Will Deacon <will@xxxxxxxxxx>
Cc: linuxarm@xxxxxxxxxx
Link: http://lore.kernel.org/lkml/1567612484-195727-5-git-send-email-john.garry@xxxxxxxxxx
Signed-off-by: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
---
tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
index 447d306..3be418a 100644
--- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
@@ -21,6 +21,13 @@
"Unit": "hisi_sccl,hha",
},
{
+ "EventCode": "0x03",
+ "EventName": "uncore_hisi_hha.rx_ccix",
+ "BriefDescription": "Count of the number of operations that HHA has received from CCIX",
+ "PublicDescription": "Count of the number of operations that HHA has received from CCIX",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
"EventCode": "0x1c",
"EventName": "uncore_hisi_hha.rd_ddr_64b",
"BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes",
@@ -29,7 +36,7 @@
},
{
"EventCode": "0x1d",
- "EventName": "uncore_hisi_hha.wr_dr_64b",
+ "EventName": "uncore_hisi_hha.wr_ddr_64b",
"BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
"PublicDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
"Unit": "hisi_sccl,hha",
@@ -48,4 +55,18 @@
"PublicDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes",
"Unit": "hisi_sccl,hha",
},
+ {
+ "EventCode": "0x20",
+ "EventName": "uncore_hisi_hha.spill_num",
+ "BriefDescription": "Count of the number of spill operations that the HHA has sent",
+ "PublicDescription": "Count of the number of spill operations that the HHA has sent",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x21",
+ "EventName": "uncore_hisi_hha.spill_success",
+ "BriefDescription": "Count of the number of successful spill operations that the HHA has sent",
+ "PublicDescription": "Count of the number of successful spill operations that the HHA has sent",
+ "Unit": "hisi_sccl,hha",
+ },
]