Re: [PATCH v2 04/12] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1

[Will Deacon]

On Mon, Oct 21, 2019 at 08:18:18PM +0100, Mark Brown wrote:
> On Fri, Oct 11, 2019 at 03:51:49PM +0100, Dave Martin wrote:
> > On Fri, Oct 11, 2019 at 02:19:48PM +0100, Alex Bennée wrote:
> 
> > > > -  4) ID_AA64ISAR1_EL1 - Instruction set attribute register 1
> > > > +  5) ID_AA64ISAR1_EL1 - Instruction set attribute register 1
> 
> > > If I'm not mistaken .rst has support for auto-enumeration if the #
> > > character is used. That might reduce the pain of re-numbering in future.
> 
> > Ack, though it would be good to go one better and generate this document
> > from the cpufeature.c tables (or from some common source).  The numbers
> > are relatively easy to maintain -- remembering to update the document
> > at all seems the bigger maintenance headache right now.
> 
> I agree, it'd be better if the table were autogenerated.  Having tried
> doing the modification to # it does mean that the document looks a bit
> weird when viewing it as a text file in the kernel source which TBH is
> how I suspect a lot of people will view it so given the infrequency with
> which new registers are added I'm not sure it's worth it.
> 
> > I think this particular patch is superseded by similar fixes from other
> > people, just not in torvalds/master yet.
> 
> Nor in -next for the minute :/

Which patch is missing? The only other one on my radar is "docs/arm64:
cpu-feature-registers: Documents missing visible fields" which is currently
in -next as a8613e7070e7. "similar fixes from other people" isn't very
specific :(

Will