Re: [PATCH][RFC] mtd: spinand: fix detection of GD5FxGQ4xA flash

[Miquel Raynal]

Hello,

Chuanhong Guo <gch981213@xxxxxxxxx> wrote on Wed, 16 Oct 2019 09:38:24
+0800:

> GD5FxGQ4xA didn't follow the SPI spec to keep MISO low while slave is
> reading, and instead MISO is kept high. As a result, the first byte
> of id becomes 0xFF.
> Since the first byte isn't supposed to be checked at all, this patch
> just removed that check.
> 
> While at it, redo the comment above to better explain what's happening.
> 
> Fixes: cfd93d7c908e ("mtd: spinand: Add support for GigaDevice GD5F1GQ4UFxxG")
> Signed-off-by: Chuanhong Guo <gch981213@xxxxxxxxx>
> CC: Jeff Kletsky <git-commits@xxxxxxxxxxxx>
> ---
> RFC:
> I doubt whether this patch is a proper fix for the underlying problem:
> The actual problem is that we have two different implementation of read id
> command: One replies immediately after master sending 0x9f and the other
> need to send 0x9f and an offset byte (found in winbond and early GD flashes.)
> Current code only works if SPI master is properly implemented (i.e. keep MOSI
> low while reading.)

I am not entirely against the fix, but this is a SPI host controller
issue, right? Can you try to fix the controller driver instead?

Thanks,
MiquÃl