Re: [PATCH v5 1/2] soc/tegra: pmc: Query PCLK clock rate at probe time

[Thierry Reding]

On Thu, Sep 26, 2019 at 10:17:54PM +0300, Dmitry Osipenko wrote:
> It is possible to get a lockup if kernel decides to enter LP2 cpuidle
> from some clk-notifier, in that case CCF's "prepare" mutex is kept locked
> and thus clk_get_rate(pclk) blocks on the same mutex with interrupts being
> disabled, hanging machine.
> 
> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
> ---
> 
> Changelog:
> 
> v5: Clk notifier now takes powergates_lock to avoid potential racing with
>     tegra_io_pad_*().
> 
>     The original fallback to 100MHz when clk_get_rate() fails is preserved
>     now.
> 
> v4: Added clk-notifier to track PCLK rate-changes, which may become useful
>     in the future. That's done in response to v3 review comment from Peter
>     De Schrijver.
> 
>     Now properly handling case where clk pointer is intentionally NULL on
>     the driver's probe.
> 
> v3: Changed commit's message because I actually recalled what was the
>     initial reason for the patch, since the problem reoccurred once again.
> 
> v2: Addressed review comments that were made by Jon Hunter to v1 by
>     not moving the memory barrier, replacing one missed clk_get_rate()
>     with pmc->rate, handling possible clk_get_rate() error on probe and
>     slightly adjusting the commits message.
> 
>  drivers/soc/tegra/pmc.c | 71 ++++++++++++++++++++++++++++++++---------
>  1 file changed, 56 insertions(+), 15 deletions(-)

Applied to for-5.5/soc, thanks.

Thierry

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