On Thu, Oct 03, 2019 at 04:39:03PM -0700, sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx wrote:Ok. I will include it.
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx>Specific reference, please, e.g., the section/table/figure of the PCI
As per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN,
Firmware Spec being modified by the ECN.
Yes, EDR mode is an upgrade to FF mode in which firmware allows
OS is responsible for clearing the AERI guess "EDR mode" is effectively the same as "firmware-first mode"?
registers in EDR mode. So clear AER registers in dpc_process_error()
function.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx>
Acked-by: Keith Busch <keith.busch@xxxxxxxxx>
---
drivers/pci/pcie/dpc.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index fafc55c00fe0..de2d892bc7c4 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -275,6 +275,10 @@ static void dpc_process_error(struct dpc_dev *dpc)
pci_aer_clear_fatal_status(pdev);
}
+ /* In EDR mode, OS is responsible for clearing AER registers */
+ if (dpc->firmware_dpc)
For better readability and performance, I tried to cache the value of
At least, the only place we set "firmware_dpc = 1" is:
+ if (pcie_aer_get_firmware_first(pdev))
+ dpc->firmware_dpc = 1;
If they're the same, why do we need two different names for it?
--
+ pci_cleanup_aer_error_status_regs(pdev);
+
/*
* Irrespective of whether the DPC event is triggered by
* ERR_FATAL or ERR_NONFATAL, since the link is already down,
--
2.21.0