Re: [PATCH] docs/arm64: cpu-feature-registers: Rewrite bitfields that don't follow [e, s]

[Will Deacon]

On Fri, Nov 01, 2019 at 03:20:22PM +0000, Julien Grall wrote:
> From: Julien Grall <julien.grall@xxxxxxx>
> 
> Commit "docs/arm64: cpu-feature-registers: Documents missing visible
> fields" added bitfiels following the convention [s, e]. However, the

typo: bitfiels

> documentation is following [s, e] and so does the Arm ARM.

This should be [e, s], although I think you can spell it out as "end" and
"start" so people know what this is doing.

> 
> Rewrite the bitfields to match the format [e, s].
> 
> Signed-off-by: Julien Grall <julien.grall@xxxxxxx>
> 
> ---
> 
> This is based on the branch for-next/elf-hwcap-docs from the tree
> arm64/linux.git.
> ---
>  Documentation/arm64/cpu-feature-registers.rst | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
> index ffcf4e2c71ef..7c40e4581bae 100644
> --- a/Documentation/arm64/cpu-feature-registers.rst
> +++ b/Documentation/arm64/cpu-feature-registers.rst
> @@ -193,9 +193,9 @@ infrastructure:
>       +------------------------------+---------+---------+
>       | Name                         |  bits   | visible |
>       +------------------------------+---------+---------+
> -     | SB                           | [36-39] |    y    |
> +     | SB                           | [39-36] |    y    |
>       +------------------------------+---------+---------+
> -     | FRINTTS                      | [32-35] |    y    |
> +     | FRINTTS                      | [35-32] |    y    |
>       +------------------------------+---------+---------+
>       | GPI                          | [31-28] |    y    |
>       +------------------------------+---------+---------+

diff looks fine.

Will