Re: [PATCH V2] clk: imx: imx8mq: fix sys3_pll_out_sels

From: Shawn Guo
Date: Sun Nov 03 2019 - 20:11:54 EST


On Mon, Oct 28, 2019 at 03:08:34AM +0000, Peng Fan wrote:
> From: Peng Fan <peng.fan@xxxxxxx>
>
> It is not correct that sys3_pll_out use sys2_pll1_ref_sel as parent.
>
> According to the current imx_clk_sccg_pll design, it uses both
> bypass1/2, however set bypass2 as 1 is not correct, because it will
> make sys[x]_pll_out use wrong parent and might access wrong registers.
>
> So correct bypass2 to 0 and fix sys3_pll_out_sels.
>
> Fixes: e9dda4af685f ("clk: imx: Refactor entire sccg pll clk")
> Signed-off-by: Peng Fan <peng.fan@xxxxxxx>

Applied, thanks.