GSWIP (a new HW IP) is part of Intel Datapath Architecture drivers design for new Intel network/GW SoC (LGM).On Mon, Nov 04, 2019 at 07:22:20PM +0800, Jack Ping CHNG wrote:
This driver enables the Intel's LGM SoC GSWIP block.Why is this being submitted to staging? What is wrong with the "real"
GSWIP is a core module tailored for L2/L3/L4+ data plane and QoS functions.
It allows CPUs and other accelerators connected to the SoC datapath
to enqueue and dequeue packets through DMAs.
Most configuration values are stored in tables such as Parsing and
Classification Engine tables, Buffer Manager tables and Pseudo MAC
tables.
part of the kernel for this?
Or even, what is wrong with the current driver?
drivers/net/dsa/lantiq_gswip.c?
Jack, your patch does not seem to of made it to any of the lists. So i cannot comment on it contents. If this is a switch driver, please ensure you Cc: the usual suspects for switch drivers.
Andrew