Re: [PATCH] dmaengine: sprd: Add wrap address support for link-list mode

[Vinod Koul]

On 23-10-19, 14:31, Baolin Wang wrote:
> From: Eric Long <eric.long@xxxxxxxxxx>
> 
> The Spreadtrum Audio compress offload mode will use 2-stage DMA transfer
> to save power. That means we can request 2 dma channels, one for source
> channel, and another one for destination channel. Once the source channel's
> transaction is done, it will trigger the destination channel's transaction
> automatically by hardware signal.
> 
> In this case, the source channel will transfer data from IRAM buffer to
> the DSP fifo to decoding/encoding, once IRAM buffer is empty by transferring
> done, the destination channel will start to transfer data from DDR buffer
> to IRAM buffer. Since the destination channel will use link-list mode to
> fill the IRAM data, and IRAM buffer is allocated by 32K, and DDR buffer
> is larger to 2M, that means we need lots of link-list nodes to do a cyclic
> transfer, instead wasting lots of link-list memory, we can use wrap address
> support to reduce link-list node number, which means when the transfer
> address reaches the wrap address, the transfer address will jump to the
> wrap_to address specified by wrap_to register, and only 2 link-list nodes
> can do a cyclic transfer to transfer data from DDR to IRAM.
> 
> Thus this patch adds wrap address to support this case.

This fails to apply, can you please rebase and resend!

Thanks
-- 
~Vinod