Re: [PATCH] perf/x86/intel: Avoid PEBS_ENABLE MSR access in PMI

[Peter Zijlstra]

On Fri, Nov 15, 2019 at 05:39:17AM -0800, kan.liang@xxxxxxxxxxxxxxx wrote:
> From: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
> 
> The perf PMI handler, intel_pmu_handle_irq(), currently does
> unnecessary MSR accesses when PEBS is enabled.
> 
> When entering the handler, global ctrl is explicitly disabled. All
> counters do not count anymore. It doesn't matter if the PEBS is
> enabled or disabled. Furthermore, cpuc->pebs_enabled is not changed
> in PMI. The PEBS status doesn't change. The PEBS_ENABLE MSR doesn't need
> to be changed either.

PMI can throttle, and iirc x86_pmu_stop() ends up in
intel_pmu_pebs_disable()