Re: [PATCH v7 4/8] pwm: sun4i: Add an optional probe for bus clock

From: ClÃment PÃron
Date: Thu Nov 21 2019 - 06:14:49 EST


Hi Uwe,

On Thu, 21 Nov 2019 at 08:28, Uwe Kleine-KÃnig
<u.kleine-koenig@xxxxxxxxxxxxxx> wrote:
>
> Hello ClÃment,
>
> On Tue, Nov 19, 2019 at 06:53:15PM +0100, ClÃment PÃron wrote:
> > + /*
> > + * We're keeping the bus clock on for the sake of simplicity.
> > + * Actually it only needs to be on for hardware register accesses.
> > + */
> > + ret = clk_prepare_enable(pwm->bus_clk);
> > + if (ret) {
> > + dev_err(&pdev->dev, "Cannot prepare and enable bus_clk\n");
>
> Maybe add the error code to the message?

Ok I will change it for the reset control deassert if you agree.

Clement

>
> Best regards
> Uwe
>
> --
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