[PATCH] arm64: dts: sl28: configure the RGMII PHY

[Michael Walle]

This uses the new AR8031 PHY binding to enable to clock output and switch
the RGMII I/O voltage to 1.8V.

Signed-off-by: Michael Walle <michael@xxxxxxxx>
---
This is not part of the previous series, because it depends on the
following patch series which is currently in net-next:

https://lore.kernel.org/netdev/20191106223617.1655-1-michael@xxxxxxxx/

This is the previous series which this depends on:
https://lore.kernel.org/linux-devicetree/20191123201317.25861-5-michael@xxxxxxxx/

 .../freescale/fsl-ls1028a-kontron-sl28-var4.dts  | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts
index 5c8b13108e4d..f659e89face8 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts
@@ -11,6 +11,7 @@
 
 /dts-v1/;
 #include "fsl-ls1028a-kontron-sl28.dts"
+#include <dt-bindings/net/qca-ar803x.h>
 
 / {
 	model = "Kontron SMARC-sAL28 (Dual PHY)";
@@ -29,6 +30,21 @@
 			reg = <0x4>;
 			eee-broken-1000t;
 			eee-broken-100tx;
+
+			qca,clk-out-frequency = <125000000>;
+			qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
+
+			vddio-supply = <&vddh>;
+
+			vddio: vddio-regulator {
+				regulator-name = "VDDIO";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+			};
+
+			vddh: vddh-regulator {
+				regulator-name = "VDDH";
+			};
 		};
 	};
 };
-- 
2.20.1