Re: [PATCH 4/5] pinctrl: dw: add pinctrl support for dwapb gpio driver
From: Andy Shevchenko
Date: Wed Dec 04 2019 - 07:43:29 EST
On Wed, Dec 4, 2019 at 12:12 PM Clement Leger <cleger@xxxxxxxxx> wrote:
>
> Synopsys designware gpio controller also has pinmuxing functionnality.
DesignWare
pin muxing
functionality
(Please, run a spell checker)
> Pinmuxing allows to choose between software and hardware mode. When
Pin muxing
> using hardware mode, an external signal controls the pin output.
>
> This patch adds support for pinctrl framework in the gpio driver. This
GPIO
> support is conditionned by the snps,has-pinctrl device tree property.
conditioned
> Indeed, the functionnality can be detected only if the gpio IP has been
functionality
> configured using paremeters encoding which is not always present. If
parameters
> property is present, then the pinctrl will be registered and will
> allow switching to the "hw" functionnality and hence enable the
functionality
> alternate function.
> +static const struct pinctrl_pin_desc dwapb_pins[] = {
...
> + DWAPB_PINCTRL_PIN(31)
Keep comma in such cases.
> +};
Can't you split adding pin control data to a separate patch?
> +/* One pin per group */
> +static const char * const dwapb_gpio_groups[] = {
...
> + "pin31"
Keep comma here.
> +};
Can't we generate these lists dynamically?
> + dev_info(gpio->dev, "Setting func %s on pin %d",
> + dwapb_gpio_functions[selector], group);
Noise!
> + ret = pinctrl_enable(port->pctl);
> + if (ret) {
> + dev_err(gpio->dev, "pinctrl enable failed\n");
> + return ret;
> + }
Not sure why it's needed at all.
> + range = &port->range;
> + range->name = dev_name(gpio->dev);
> + range->id = port->idx;
> + range->pin_base = 0;
> + range->base = port->gc.base;
> + range->npins = pp->ngpio;
> + range->gc = &port->gc;
> +
> + pinctrl_add_gpio_range(port->pctl, range);
Can you use new callback for this?
> - .name = "gpio-dwapb",
> + .name = "pinctrl-dwapb",
This will break existing users.
--
With Best Regards,
Andy Shevchenko