[PATCH 1/5] firmware: xilinx: Adds new eemi call for reg access
From: Jolly Shah
Date: Wed Dec 04 2019 - 18:29:55 EST
From: Rajan Vaja <rajan.vaja@xxxxxxxxxx>
This patch adds new EEMI call which is used for CSU/PMU register
access from linux.
Signed-off-by: Michal Simek <michal.simek@xxxxxxxxxx>
Signed-off-by: Rajan Vaja <rajan.vaja@xxxxxxxxxx>
Signed-off-by: Jolly Shah <jolly.shah@xxxxxxxxxx>
---
drivers/firmware/xilinx/zynqmp.c | 183 +++++++++++++++++++++++++++++++++++
include/linux/firmware/xlnx-zynqmp.h | 9 ++
2 files changed, 192 insertions(+)
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index fd3d837..56431ad 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -24,6 +24,8 @@
#include <linux/firmware/xlnx-zynqmp.h>
#include "zynqmp-debug.h"
+static unsigned long register_address;
+
static const struct zynqmp_eemi_ops *eemi_ops_tbl;
static const struct mfd_cell firmware_devs[] = {
@@ -664,6 +666,26 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
qos, ack, NULL);
}
+/**
+ * zynqmp_pm_config_reg_access - PM Config API for Config register access
+ * @register_access_id: ID of the requested REGISTER_ACCESS
+ * @address: Address of the register to be accessed
+ * @mask: Mask to be written to the register
+ * @value: Value to be written to the register
+ * @out: Returned output value
+ *
+ * This function calls REGISTER_ACCESS to configure CSU/PMU registers.
+ *
+ * Return: Returns status, either success or error+reason
+ */
+
+static int zynqmp_pm_config_reg_access(u32 register_access_id, u32 address,
+ u32 mask, u32 value, u32 *out)
+{
+ return zynqmp_pm_invoke_fn(PM_REGISTER_ACCESS, register_access_id,
+ address, mask, value, out);
+}
+
static const struct zynqmp_eemi_ops eemi_ops = {
.get_api_version = zynqmp_pm_get_api_version,
.get_chipid = zynqmp_pm_get_chipid,
@@ -687,6 +709,7 @@ static const struct zynqmp_eemi_ops eemi_ops = {
.set_requirement = zynqmp_pm_set_requirement,
.fpga_load = zynqmp_pm_fpga_load,
.fpga_get_status = zynqmp_pm_fpga_get_status,
+ .register_access = zynqmp_pm_config_reg_access,
};
/**
@@ -704,6 +727,160 @@ const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
}
EXPORT_SYMBOL_GPL(zynqmp_pm_get_eemi_ops);
+/**
+ * config_reg_store - Write config_reg sysfs attribute
+ * @kobj: Kobject structure
+ * @attr: Kobject attribute structure
+ * @buf: User entered health_status attribute string
+ * @count: Buffer size
+ *
+ * User-space interface for setting the config register.
+ *
+ * To write any CSU/PMU register
+ * echo <address> <mask> <values> > /sys/firmware/zynqmp/config_reg
+ * Usage:
+ * echo 0x345AB234 0xFFFFFFFF 0x1234ABCD > /sys/firmware/zynqmp/config_reg
+ *
+ * To Read any CSU/PMU register, write address to the variable like below
+ * echo <address> > /sys/firmware/zynqmp/config_reg
+ *
+ * Return: count argument if request succeeds, the corresponding error
+ * code otherwise
+ */
+static ssize_t config_reg_store(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ const char *buf, size_t count)
+{
+ char *kern_buff, *inbuf, *tok;
+ unsigned long address, value, mask;
+ int ret;
+
+ kern_buff = kzalloc(count, GFP_KERNEL);
+ if (!kern_buff)
+ return -ENOMEM;
+
+ ret = strlcpy(kern_buff, buf, count);
+ if (ret < 0) {
+ ret = -EFAULT;
+ goto err;
+ }
+
+ inbuf = kern_buff;
+
+ /* Read the addess */
+ tok = strsep(&inbuf, " ");
+ if (!tok) {
+ ret = -EFAULT;
+ goto err;
+ }
+ ret = kstrtol(tok, 16, &address);
+ if (ret) {
+ ret = -EFAULT;
+ goto err;
+ }
+ /* Read the write value */
+ tok = strsep(&inbuf, " ");
+ /*
+ * If parameter provided is only address, then its a read operation.
+ * Store the address in a global variable and retrieve whenever
+ * required.
+ */
+ if (!tok) {
+ register_address = address;
+ goto err;
+ }
+ register_address = address;
+
+ ret = kstrtol(tok, 16, &mask);
+ if (ret) {
+ ret = -EFAULT;
+ goto err;
+ }
+ tok = strsep(&inbuf, " ");
+ if (!tok) {
+ ret = -EFAULT;
+ goto err;
+ }
+ ret = kstrtol(tok, 16, &value);
+ if (!tok) {
+ ret = -EFAULT;
+ goto err;
+ }
+ ret = zynqmp_pm_config_reg_access(CONFIG_REG_WRITE, address,
+ mask, value, NULL);
+ if (ret)
+ pr_err("unable to write value to %lx\n", value);
+err:
+ kfree(kern_buff);
+ if (ret)
+ return ret;
+ return count;
+}
+
+/**
+ * config_reg_show - Read config_reg sysfs attribute
+ * @kobj: Kobject structure
+ * @attr: Kobject attribute structure
+ * @buf: User entered health_status attribute string
+ *
+ * User-space interface for getting the config register.
+ *
+ * To Read any CSU/PMU register, write address to the variable like below
+ * echo <address> > /sys/firmware/zynqmp/config_reg
+ *
+ * Then Read the address using below command
+ * cat /sys/firmware/zynqmp/config_reg
+ *
+ * Return: number of chars written to buf.
+ */
+static ssize_t config_reg_show(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+ int ret;
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+
+ ret = zynqmp_pm_config_reg_access(CONFIG_REG_READ, register_address,
+ 0, 0, ret_payload);
+ if (ret)
+ return ret;
+
+ return sprintf(buf, "0x%x\n", ret_payload[1]);
+}
+
+static struct kobj_attribute zynqmp_attr_config_reg =
+ __ATTR_RW(config_reg);
+
+static struct attribute *attrs[] = {
+ &zynqmp_attr_config_reg.attr,
+ NULL,
+};
+
+static const struct attribute_group attr_group = {
+ .attrs = attrs,
+ NULL,
+};
+
+static int zynqmp_pm_sysfs_init(void)
+{
+ struct kobject *zynqmp_kobj;
+ int ret;
+
+ zynqmp_kobj = kobject_create_and_add("zynqmp", firmware_kobj);
+ if (!zynqmp_kobj) {
+ pr_err("zynqmp: Firmware kobj add failed.\n");
+ return -ENOMEM;
+ }
+
+ ret = sysfs_create_group(zynqmp_kobj, &attr_group);
+ if (ret) {
+ pr_err("%s() sysfs creation fail with error %d\n",
+ __func__, ret);
+ }
+
+ return ret;
+}
+
static int zynqmp_firmware_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -748,6 +925,12 @@ static int zynqmp_firmware_probe(struct platform_device *pdev)
/* Assign eemi_ops_table */
eemi_ops_tbl = &eemi_ops;
+ ret = zynqmp_pm_sysfs_init();
+ if (ret) {
+ pr_err("%s() sysfs init fail with error %d\n", __func__, ret);
+ return ret;
+ }
+
zynqmp_pm_api_debugfs_init();
ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index df366f1..55561d0 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -77,6 +77,8 @@ enum pm_api_id {
PM_CLOCK_GETRATE,
PM_CLOCK_SETPARENT,
PM_CLOCK_GETPARENT,
+ /* PM_REGISTER_ACCESS API */
+ PM_REGISTER_ACCESS = 52,
};
/* PMU-FW return status codes */
@@ -261,6 +263,11 @@ enum tap_delay_type {
PM_TAPDELAY_OUTPUT,
};
+enum pm_register_access_id {
+ CONFIG_REG_WRITE,
+ CONFIG_REG_READ,
+};
+
/**
* struct zynqmp_pm_query_data - PM query data
* @qid: query ID
@@ -305,6 +312,8 @@ struct zynqmp_eemi_ops {
const u32 capabilities,
const u32 qos,
const enum zynqmp_pm_request_ack ack);
+ int (*register_access)(u32 register_access_id, u32 address,
+ u32 mask, u32 value, u32 *out);
};
int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
--
2.7.4