Re: [PATCH v3 2/2] mm, drm/ttm: Fix vm page protection handling

[Michal Hocko]

On Fri 06-12-19 14:16:10, Thomas Hellstrom wrote:
> Hi Michal,
> 
> On Fri, 2019-12-06 at 11:30 +0100, Michal Hocko wrote:
> > On Fri 06-12-19 09:24:26, Thomas Hellström (VMware) wrote:
> > [...]
> > > @@ -283,11 +282,26 @@ vm_fault_t ttm_bo_vm_fault_reserved(struct
> > > vm_fault *vmf,
> > >  			pfn = page_to_pfn(page);
> > >  		}
> > >  
> > > +		/*
> > > +		 * Note that the value of @prot at this point may
> > > differ from
> > > +		 * the value of @vma->vm_page_prot in the caching- and
> > > +		 * encryption bits. This is because the exact location
> > > of the
> > > +		 * data may not be known at mmap() time and may also
> > > change
> > > +		 * at arbitrary times while the data is mmap'ed.
> > > +		 * This is ok as long as @vma->vm_page_prot is not used
> > > by
> > > +		 * the core vm to set caching- and encryption bits.
> > > +		 * This is ensured by core vm using pte_modify() to
> > > modify
> > > +		 * page table entry protection bits (that function
> > > preserves
> > > +		 * old caching- and encryption bits), and the @fault
> > > +		 * callback being the only function that creates new
> > > +		 * page table entries.
> > > +		 */
> > 
> > While this is a very valuable piece of information I believe we need
> > to
> > document this in the generic code where everybody will find it.
> > vmf_insert_mixed_prot sounds like a good place to me. So being
> > explicit
> > about VM_MIXEDMAP. Also a reference from vm_page_prot to this
> > function
> > would be really helpeful.
> > 
> > Thanks!
> > 
> 
> Just to make sure I understand correctly. You'd prefer this (or
> similar) text to be present at the vmf_insert_mixed_prot() and
> vmf_insert_pfn_prot() definitions for MIXEDMAP and PFNMAP respectively,
> and a pointer from vm_page_prot to that text. Is that correct?

Yes. You can keep whatever is specific to TTM here but the rest should
be somewhere visible to users of the interface and a note at
vm_page_prot should help anybody touching the generic/core code to not
break those expectations.

Thanks!
-- 
Michal Hocko
SUSE Labs