Re: [PATCH RFC 1/1] genirq: Make threaded handler use irq affinity for managed interrupt

From: John Garry
Date: Wed Dec 11 2019 - 04:41:11 EST

On 10/12/2019 18:32, Marc Zyngier wrote:
The ITS code will make the lowest online CPU in the affinity mask
target CPU for the interrupt, which may result in some CPUs
so many interrupts.
If what you want is for the*default* affinity to be spread around,
that should be achieved pretty easily. Let me have a think about how
to do that.
Cool, I anticipate that it should help my case.

I can also seek out some NVMe cards to see how it would help a more
"generic" scenario.
Can you give the following a go? It probably has all kind of warts on
top of the quality debug information, but I managed to get my D05 and
a couple of guests to boot with it. It will probably eat your data,
so use caution!;-)

Hi Marc,

Ok, we'll give it a spin.




diff --git a/drivers/irqchip/irq-gic-v3-its.c
index e05673bcd52b..301ee3bc0602 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -177,6 +177,8 @@ static DEFINE_IDA(its_vpeid_ida);