On 11/12/2019 09:41, John Garry wrote:
On 10/12/2019 18:32, Marc Zyngier wrote:
Hi Marc,Can you give the following a go? It probably has all kind of warts onCool, I anticipate that it should help my case.The ITS code will make the lowest online CPU in the affinity maskIf what you want is for the*default*Â affinity to be spread around,
the
target CPU for the interrupt, which may result in some CPUs
handling
so many interrupts.
that should be achieved pretty easily. Let me have a think about how
to do that.
I can also seek out some NVMe cards to see how it would help a more
"generic" scenario.
top of the quality debug information, but I managed to get my D05 and
a couple of guests to boot with it. It will probably eat your data,
so use caution!;-)
Ok, we'll give it a spin.
Thanks,
John
Hi Marc,
JFYI, we're still testing this and the patch itself seems to work as
intended.
Here's the kernel log if you just want to see how the interrupts are
getting assigned:
https://pastebin.com/hh3r810g
For me, I did get a performance boost for NVMe testing, but my
colleague Xiang Chen saw a drop for our storage test of interest -
that's the HiSi SAS controller. We're trying to make sense of it now.