Re: [PATCH RFC 1/1] genirq: Make threaded handler use irq affinity for managed interrupt
From: John Garry
Date: Fri Dec 13 2019 - 12:50:52 EST
On 13/12/2019 17:12, Ming Lei wrote:
pu list 80-83, effective list 81
Right, the rule is simple: distribute effective list among CPUs evenly,
irq 97, cpu list 84-87, effective list 86
irq 98, cpu list 88-91, effective list 89
irq 99, cpu list 92-95, effective list 93
I'm now thinking that we should just attempt this intelligent CPU affinity
assignment for managed interrupts.
meantime select the effective CPU from the irq's affinity mask.
Even if we fix that, there is still a potential to have a CPU handling
multiple nvme completion queues due to many factors, like cpu count,
probe ordering, other PCI endpoints in the system, etc, so this lockup
needs to be remedied.