Re: [PATCH 2/2] clk: mmp2: Fix the order of timer mux parents

[Stephen Boyd]

Quoting Lubomir Rintel (2019-12-18 11:04:54)
> Determined empirically, no documentation is available.
> 
> The OLPC XO-1.75 laptop used parent 1, that one being VCTCXO/4 (65MHz), but
> thought it's a VCTCXO/2 (130MHz). The mmp2 timer driver, not knowing
> what is going on, ended up just dividing the rate as of
> commit f36797ee4380 ("ARM: mmp/mmp2: dt: enable the clock")'
> 
> Signed-off-by: Lubomir Rintel <lkundrak@xxxxx>
> ---

Any Fixes: tag?

Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx>