Re: [PATCH v4 3/3] arm64: dts: Add Unisoc's SC9863A SoC support

[Rob Herring]

On Mon, Dec 09, 2019 at 07:44:04PM +0800, Chunyan Zhang wrote:
> From: Chunyan Zhang <chunyan.zhang@xxxxxxxxxx>
> 
> Add basic DT to support Unisoc's SC9863A, with this patch,
> the board sp9863a-1h10 can run into console.
> 
> Signed-off-by: Chunyan Zhang <chunyan.zhang@xxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/sprd/Makefile         |   3 +-
>  arch/arm64/boot/dts/sprd/sc9863a.dtsi     | 523 ++++++++++++++++++++++
>  arch/arm64/boot/dts/sprd/sharkl3.dtsi     | 148 ++++++
>  arch/arm64/boot/dts/sprd/sp9863a-1h10.dts |  39 ++
>  4 files changed, 712 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm64/boot/dts/sprd/sc9863a.dtsi
>  create mode 100644 arch/arm64/boot/dts/sprd/sharkl3.dtsi
>  create mode 100644 arch/arm64/boot/dts/sprd/sp9863a-1h10.dts


> diff --git a/arch/arm64/boot/dts/sprd/sharkl3.dtsi b/arch/arm64/boot/dts/sprd/sharkl3.dtsi
> new file mode 100644
> index 000000000000..3b5a94560481
> --- /dev/null
> +++ b/arch/arm64/boot/dts/sprd/sharkl3.dtsi
> @@ -0,0 +1,148 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Unisoc Sharkl3 platform DTS file
> + *
> + * Copyright (C) 2019, Unisoc Inc.
> + */
> +
> +/ {
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	soc: soc {
> +		compatible = "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		ap_ahb_regs: syscon@20e00000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x20e00000 0 0x4000>;
> +		};
> +
> +		pub_ctrl_regs: syscon@300e0000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";

Having a bunch of the same compatible doesn't look right. I assume by 
the label names each of these are a different set of registers. The 
compatible should be specific enough the OS can match to a driver that 
knows the register details.

Doesn't look like you use all these, so maybe drop until you do and/or 
figure out if you can use common bindings for some of these.

> +			reg = <0 0x300e0000 0 0x4000>;
> +		};
> +
> +		pub_wrap_regs: syscon@300f0000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x300f0000 0 0x1000>;
> +		};
> +
> +		pmu_regs: syscon@402b0000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x402b0000 0 0x4000>;
> +		};
> +
> +		aon_apb_regs: syscon@402e0000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x402e0000 0 0x4000>;
> +		};
> +
> +		anlg_phy_g1_regs: syscon@40350000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x40350000 0 0x3000>;
> +		};
> +
> +		anlg_phy_g2_regs: syscon@40353000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x40353000 0 0x3000>;
> +		};
> +
> +		anlg_phy_g4_regs: syscon@40359000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x40359000 0 0x3000>;
> +		};
> +
> +		anlg_phy_g5_regs: syscon@4035c000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x4035c000 0 0x3000>;
> +		};
> +
> +		anlg_phy_g7_regs: syscon@40363000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x40363000 0 0x3000>;
> +		};
> +
> +		anlg_wrap_wcn_regs: syscon@40366000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x40366000 0 0x3000>;
> +		};
> +
> +		mm_ahb_regs: syscon@60800000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x60800000 0 0x1000>;
> +		};
> +
> +		mm_vsp_ahb_regs: syscon@62000000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x62000000 0 0x1000>;
> +		};
> +
> +		ap_apb_regs: syscon@71300000 {
> +			compatible = "sprd,sc9863a-glbregs", "syscon";
> +			reg = <0 0x71300000 0 0x4000>;
> +		};
> +
> +		apb@70000000 {
> +			compatible = "simple-bus";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0x0 0x70000000 0x10000000>;
> +
> +			uart0: serial@0 {
> +				compatible = "sprd,sc9863a-uart",
> +					     "sprd,sc9836-uart";
> +				reg = <0x0 0x100>;
> +				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&ext_26m>;
> +				status = "disabled";
> +			};
> +
> +			uart1: serial@100000 {
> +				compatible = "sprd,sc9863a-uart",
> +					     "sprd,sc9836-uart";
> +				reg = <0x100000 0x100>;
> +				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&ext_26m>;
> +				status = "disabled";
> +			};
> +
> +			uart2: serial@200000 {
> +				compatible = "sprd,sc9863a-uart",
> +					     "sprd,sc9836-uart";
> +				reg = <0x200000 0x100>;
> +				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&ext_26m>;
> +				status = "disabled";
> +			};
> +
> +			uart3: serial@300000 {
> +				compatible = "sprd,sc9863a-uart",
> +					     "sprd,sc9836-uart";
> +				reg = <0x300000 0x100>;
> +				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&ext_26m>;
> +				status = "disabled";
> +			};
> +
> +			uart4: serial@400000 {
> +				compatible = "sprd,sc9863a-uart",
> +					     "sprd,sc9836-uart";
> +				reg = <0x400000 0x100>;
> +				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&ext_26m>;
> +				status = "disabled";
> +			};
> +		};
> +	};
> +
> +	ext_26m: ext-26m {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <26000000>;
> +		clock-output-names = "ext-26m";
> +	};
> +};
> diff --git a/arch/arm64/boot/dts/sprd/sp9863a-1h10.dts b/arch/arm64/boot/dts/sprd/sp9863a-1h10.dts
> new file mode 100644
> index 000000000000..5c32c1596337
> --- /dev/null
> +++ b/arch/arm64/boot/dts/sprd/sp9863a-1h10.dts
> @@ -0,0 +1,39 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Unisoc SP9863A-1h10 boards DTS file
> + *
> + * Copyright (C) 2019, Unisoc Inc.
> + */
> +
> +/dts-v1/;
> +
> +#include "sc9863a.dtsi"
> +
> +/ {
> +	model = "Spreadtrum SP9863A-1H10 Board";
> +
> +	compatible = "sprd,sp9863a-1h10", "sprd,sc9863a";
> +
> +	aliases {
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +	};
> +
> +	memory@80000000 {
> +		device_type = "memory";
> +		reg = <0x0 0x80000000 0x0 0x80000000>;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial1:115200n8";
> +		bootargs = "earlycon";
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&uart1 {
> +	status = "okay";
> +};
> -- 
> 2.20.1
>