Re: [PATCH v1 1/2] clk: intel: Add CGU clock driver for a new SoC

[Stephen Boyd]

Quoting Andy Shevchenko (2019-12-07 06:57:43)
> On Fri, Dec 6, 2019 at 7:06 AM Tanwar, Rahul
> <rahul.tanwar@xxxxxxxxxxxxxxx> wrote:
> > On 2/9/2019 8:24 PM, Andy Shevchenko wrote:
> > >>
> > >>      div = val < 3 ? (val + 1) : (1 << ((val - 3) / 3));
> > > It's not complete, but I think you got the idea.
> > >
> > >> So, can we eliminate table?
> >
> > In the desperation to eliminate table, below is what i can come up with:
> >
> >         struct clk_div_table div_table[16];
> 
> But this is not an elimination, it's just a replacement from static to
> dynamically calculated one.
> 
> >         int i, j;
> >
> >         for (i = 0; i < 16; i++)
> >                 div_table[i].val = i;
> >
> >         for (i = 0, j=0; i < 16; i+=3, j++) {
> >                 div_table[i].div = (i == 0) ? (1 << j) : (1 << (j + 1));
> >                 if (i == 15)
> >                         break;
> >
> >                 div_table[i + 1].div = (i == 0) ? ((1 << j) + 1) :
> >                                         (1 << (j + 1)) + (1 << (j - 1));
> >                 div_table[i + 2].div = (3 << j);
> >         }
> >
> > To me, table still looks a better approach. Also, table is more extendable &
> > consistent w.r.t. clk framework & other referenced clk drivers.
> >
> > Whats your opinion ?
> 
> Whatever CCF maintainers is fine with.
> 

Table is fine. Or something that calculates is also fine. Is it going to
be extended in the future? If we're talking about a driver for hardware
I wonder if this is really going to change in the future.

Please resend so your binding can be reviewed.