Re: SFP+ support for 8168fp/8117

[Kai-Heng Feng]

Hi Andrew,

> On Jan 2, 2020, at 23:21, Andrew Lunn <andrew@xxxxxxx> wrote:
> 
> On Thu, Jan 02, 2020 at 02:59:42PM +0800, Kai Heng Feng wrote:
>> Hi Heiner,
>> 
>> There's an 8168fp/8117 chip has SFP+ port instead of RJ45, the phy device ID matches "Generic FE-GE Realtek PHY" nevertheless.
>> The problems is that, since it uses SFP+, both BMCR and BMSR read are always zero, so Realtek phylib never knows if the link is up.
>> 
>> However, the old method to read through MMIO correctly shows the link is up:
>> static unsigned int rtl8169_xmii_link_ok(struct rtl8169_private *tp)
>> {
>>       return RTL_R8(tp, PHYstatus) & LinkStatus;
>> }
>> 
>> Few ideas here:
>> - Add a link state callback for phylib like phylink's phylink_fixed_state_cb(). However there's no guarantee that other parts of this chip works.
>> - Add SFP+ support for this chip. However the phy device matches to "Generic FE-GE Realtek PHY" which may complicate things.
>> 
>> Any advice will be welcome.
> 
> Hi Kai
> 
> Is the i2c bus accessible?

I don't think so. It seems to be a regular Realtek 8168 device with generic PCI ID [10ec:8168].

> Is there any documentation or example code?

Unfortunately no.

> 
> In order to correctly support SFP+ cages, we need access to the i2c
> bus to determine what sort of module has been inserted. It would also
> be good to have access to LOS, transmitter disable, etc, from the SFP
> cage.

Seems like we need Realtek to provide more information to support this chip with SFP+.

Kai-Heng

> 
>   Andrew