Re: [PATCH v2] clk: uniphier: Add SCSSI clock gate for each channel

From: Stephen Boyd
Date: Sun Jan 05 2020 - 02:14:48 EST

Quoting Kunihiko Hayashi (2019-12-26 17:42:05)
> SCSSI has clock gates for each channel in the SoCs newer than Pro4,
> so this adds missing clock gates for channel 1, 2 and 3. And more, this
> moves MCSSI clock ID after SCSSI.
> Fixes: ff388ee36516 ("clk: uniphier: add clock frequency support for SPI")
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx>
> Acked-by: Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx>
> ---

Applied to clk-next