Re: [PATCH 2/2] riscv: Add vector ISA support

[Guo Ren]

Thx Anup,

The purpose of the patch is to talk about abi for linux & libc.

The most confused me is how max vlen (128/256/512/1024 ???), we should
put it into sigcontext. I need people's suggestions, thx.

Anyone help to review the patch are very helpful and we could
co-developed together, Thx

On Mon, Jan 6, 2020 at 11:00 AM Anup Patel <anup@xxxxxxxxxxxxxx> wrote:
>
> On Mon, Jan 6, 2020 at 8:15 AM Alan Kao <alankao@xxxxxxxxxxxxx> wrote:
> >
> > Hi Guo,
> >
> > On Sun, Jan 05, 2020 at 10:52:15AM +0800, guoren@xxxxxxxxxx wrote:
> > > From: Guo Ren <ren_guo@xxxxxxxxx>
> > >
> > > The implementation follow the RISC-V "V" Vector Extension draft v0.8 with
> > > 128bit-vlen and it's based on linux-5.5-rc4.
> > >
> >
> > According to https://lkml.org/lkml/2019/11/22/2169, in which Paul has stated
> > that "we plan to only accept patches for new modules or extensions that have
> > been frozen or ratified by the RISC-V Foundation."
> >
> > Is v0.8 ratified enough for now?
>
> As-per the patch acceptance policy, we cannot merge it now (just like KVM
> patches) but we can always review and get the patches in final shape
> by the time spec is frozen or ratified.
>
> I think we should continue with the patch review and get this series in
> good shape.
>
> In fact, having this patches early on LKML is very helpful for people working
> on RISC-V vector extension implementation in HW. On this line, this a good
> contribution coming at the right time.
>
> Regards,
> Anup



-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/