Re: [PATCH v4 0/3] phy: cadence: j721e-wiz: Add Type-C plug flip support
From: Kishon Vijay Abraham I
Date: Mon Jan 06 2020 - 01:32:40 EST
On 09/12/19 3:19 PM, Roger Quadros wrote:
> Hi Kishon,
> On 28/10/2019 12:21, Roger Quadros wrote:
>> On J721e platform, the 2 lanes of SERDES PHY are used to achieve
>> USB Type-C plug flip support without any additional MUX component
>> by using a lane swap feature.
>> However, the driver needs to know the Type-C plug orientation before
>> it can decide whether to swap the lanes or not. This is achieved via a
>> GPIO named DIR.
>> Another constraint is that the lane swap must happen only when the PHY
>> is in inactive state. This is achieved by sampling the GPIO and
>> programming the lane swap before bringing the PHY out of reset.
>> This series adds support to read the GPIO and accordingly program
>> the Lane swap for Type-C plug flip support.
>> Series must be applied on top of
> I just tested this on top of Sierra PHY patches v3
> on v5.5-rc1
> USB3 works fine on J7ES.
> Please queue this along with the Sierra PHY patches for -next. Thanks.
This series doesn't apply cleanly. Can you resend the series please
based on phy -next?
>> - fixes in dt-binding document
>> ÂÂ - fix typo
>> ÂÂ - change to typec-dir-debounce-ms and add min/max/default values
>> ÂÂ - drop reference to uint32 type
>> - fixes in driver
>> ÂÂ - change to updated typec-dir-debounce-ms property
>> ÂÂ - add limit checks and use default value if not specified
>> - Rebase on v2 of PHY series and update DT binding to yaml
>> - revise commit log of patch 1
>> - use regmap_field in patch 3
>> Roger Quadros (3):
>> ÂÂ phy: cadence: Sierra: add phy_reset hook
>> ÂÂ dt-bindings: phy: ti,phy-j721e-wiz: Add Type-C dir GPIO
>> ÂÂ phy: ti: j721e-wiz: Manage typec-gpio-dir
>> Â .../bindings/phy/ti,phy-j721e-wiz.yamlÂÂÂÂÂÂÂ | 17 ++++++
>> Â drivers/phy/cadence/phy-cadence-sierra.cÂÂÂÂÂ | 10 +++
>> Â drivers/phy/ti/phy-j721e-wiz.cÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ | 61 +++++++++++++++++++
>> Â 3 files changed, 88 insertions(+)