Re: [PATCH v2 0/7] media: sun4i-csi: A10/A20 CSI1 and R40 CSI0 support

[Maxime Ripard]

On Mon, Jan 06, 2020 at 04:42:33PM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <wens@xxxxxxxx>
>
> Hi everyone,
>
> This is v2 of my A10/A20 CSI1 and R40 CSI0 series. v2 is simply the
> remaining patches rebased on top of linux-next 20200106, with the
> MBUS device tree binding changes converted to YAML format.
>
> This series adds basic support for CSI1 on Allwinner A10/A20 and CSI0 on
> Allwinner R40. The CSI1 block has the same structure and layout as the
> CSI0 block. Differences include:
>
>   - Only one channel in BT.656 instead of four in CSI0
>   - 10-bit raw data input vs 8-bit in CSI0
>   - 24-bit RGB888/YUV444 input vs 16-bit RGB565/YUV422 in CSI0
>   - No ISP hardware (CSI SCLK not needed)
>
> The CSI0 block in the Allwinner R40 SoC looks to be the same as the one
> in the A20. The register maps line up, and they support the same
> features. The R40 appears to support BT.1120 based on the feature
> overview, but it is not mentioned anywhere else. Also like the A20, the
> ISP is not mentioned, but the CSI special clock needs to be enabled for
> the hardware to function. The manual does state that the CSI special
> clock is the TOP clock for all CSI hardware, but currently no hardware
> exists for us to test if CSI1 also depends on it or not.
>
> Included are a couple of fixes for signal polarity and DRAM offset
> handling.
>
> Patches 1 and 2 add CSI1 to A10 (sun4i) and A20 (sun7i) dtsi files.
>
> Patch 3 adds a compatible string for the R40's MBUS (memory bus).
> This patch needs to go through Rob's tree as it now depends on
> the patch "dt-bindings: interconnect: Convert Allwinner MBUS
> controller to a schema" that was already merged.
>
> Patch 4 adds CSI0 to the R40 dtsi file
>
> Patches 5 through 7 are examples of cameras hooked up to boards.

Applied 1,2 and 4, thanks!
Maxime

Attachment: signature.asc
Description: PGP signature