[PATCH v5 10/12] ARM: dts: aspeed: ast2600: Add XDMA Engine
From: Eddie James
Date: Thu Jan 09 2020 - 15:59:56 EST
Add a node for the XDMA engine with all the necessary information.
Signed-off-by: Eddie James <eajames@xxxxxxxxxxxxx>
Reviewed-by: Andrew Jeffery <andrew@xxxxxxxx>
---
arch/arm/boot/dts/aspeed-g6.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 6557212108a8..974cfa3cb287 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -3,6 +3,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/ast2600-clock.h>
+#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
/ {
model = "Aspeed BMC";
@@ -291,6 +292,18 @@ rng: hwrng@1e6e2524 {
quality = <100>;
};
+ xdma: xdma@1e6e7000 {
+ compatible = "aspeed,ast2600-xdma";
+ reg = <0x1e6e7000 0x100>;
+ clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
+ resets = <&syscon ASPEED_RESET_DEV_XDMA>;
+ interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
+ pcie-device = "bmc";
+ aspeed,scu = <&syscon>;
+ status = "disabled";
+ };
+
gpio0: gpio@1e780000 {
#gpio-cells = <2>;
gpio-controller;
--
2.24.0