[PATCH v3 1/3] drm/armada: add bus-width property to the output endpoint

[Lubomir Rintel]

This makes it possible to choose a different pixel format for the
endpoint. Modelled after what other LCD controllers use, including
marvell,pxa2xx-lcdc and atmel,hlcdc-display-controller and perhaps more.

Signed-off-by: Lubomir Rintel <lkundrak@xxxxx>
---
 drivers/gpu/drm/armada/armada_crtc.c | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c
index c2b92acd1e9ad..da9ba8be8b097 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -904,6 +904,8 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
 	struct armada_private *priv = drm->dev_private;
 	struct armada_crtc *dcrtc;
 	struct drm_plane *primary;
+	struct device_node *endpoint;
+	u32 bus_width = 24;
 	void __iomem *base;
 	int ret;
 
@@ -923,8 +925,31 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
 	dcrtc->variant = variant;
 	dcrtc->base = base;
 	dcrtc->num = drm->mode_config.num_crtc;
-	dcrtc->cfg_dumb_ctrl = DUMB24_RGB888_0;
+	dcrtc->clk = ERR_PTR(-EINVAL);
 	dcrtc->spu_iopad_ctrl = CFG_VSCALE_LN_EN | CFG_IOPAD_DUMB24;
+
+	endpoint = of_get_next_child(port, NULL);
+	of_property_read_u32(endpoint, "bus-width", &bus_width);
+	of_node_put(endpoint);
+
+	switch (bus_width) {
+	case 12:
+		dcrtc->cfg_dumb_ctrl = DUMB12_RGB444_0;
+		break;
+	case 16:
+		dcrtc->cfg_dumb_ctrl = DUMB16_RGB565_0;
+		break;
+	case 18:
+		dcrtc->cfg_dumb_ctrl = DUMB18_RGB666_0;
+		break;
+	case 24:
+		dcrtc->cfg_dumb_ctrl = DUMB24_RGB888_0;
+		break;
+	default:
+		DRM_ERROR("unsupported bus width: %d\n", bus_width);
+		return -EINVAL;
+	}
+
 	spin_lock_init(&dcrtc->irq_lock);
 	dcrtc->irq_ena = CLEAN_SPU_IRQ_ISR;
 
-- 
2.24.1