arch/mips/kernel/traps.c:2408: undefined reference to `handle_fpe'

From: kbuild test robot
Date: Sat Jan 11 2020 - 18:12:41 EST

Next message:
Previous
Messages

tree: config: mips-randconfig-a001-20200112 compiler: mips64-linux-gcc reproduce:
wget git checkout # save the GCC_VERSION=7.5.0
If you fix the issue, Reported-by: kbuild
All errors (new ones
arch/mips/kernel/traps.o: >> arch/mips/kerne arch/mips/kernel/traps.c:2412: arch/mips/kernel/traps.c:2412: arch/mips/kernel/traps.c:2412: arch/mips/kernel/traps.c:2412:
vim +2408 arch/mips/kernel/traps.c

5b10496b6e6577 Atsushi Nemoto ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds 2a0b24f56c2492 Steven J. Hill ^1da177e4c3f41 Linus Torvalds 2a0b24f56c2492 Steven J. Hill 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton c65a5480ff2919 Atsushi Nemoto c65a5480ff2919 Atsushi Nemoto ^1da177e4c3f41 Linus Torvalds 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton c195e079e9dd00 James Hogan 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton 172dcd935c34b0 Paul Burton f995adb0ac5bcf Paul Burton 8a7f97b902f4fb Mike Rapoport 172dcd935c34b0 Paul Burton c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan c195e079e9dd00 James Hogan f995adb0ac5bcf Paul Burton f995adb0ac5bcf Paul Burton 18022894eca131 James Hogan e01402b115cccb Ralf Baechle c6213c6c9c189a Steven J. Hill c6213c6c9c189a Steven J. Hill c6213c6c9c189a Steven J. Hill c6213c6c9c189a Steven J. Hill c6213c6c9c189a Steven J. Hill c6213c6c9c189a Steven J. Hill c6213c6c9c189a Steven J. Hill c6213c6c9c189a Steven J. Hill c6213c6c9c189a Steven J. Hill 6fb97effee5374 Kevin Cernekee 6fb97effee5374 Kevin Cernekee 6650df3c380e0d David Daney 25517ed4e99b3b Huacai Chen ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds 92a76f6d8545ef Adam Buchbinder ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds e01402b115cccb Ralf Baechle ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds e01402b115cccb Ralf Baechle e01402b115cccb Ralf Baechle ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds 1b505defe05174 James Hogan ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds e01402b115cccb Ralf Baechle ^1da177e4c3f41 Linus Torvalds e01402b115cccb Ralf Baechle e01402b115cccb Ralf Baechle e01402b115cccb Ralf Baechle e01402b115cccb Ralf Baechle e01402b115cccb Ralf Baechle e01402b115cccb Ralf Baechle e01402b115cccb Ralf Baechle ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds ^1da177e4c3f41 Linus Torvalds 1b505defe05174 James Hogan 1b505defe05174 James Hogan 1b505defe05174 James Hogan 1b505defe05174 James Hogan 1b505defe05174 James Hogan ^1da177e4c3f41 Linus Torvalds 1b505defe05174 James Hogan 1b505defe05174 James Hogan ^1da177e4c3f41 Linus Torvalds 1b505defe05174 James Hogan 1b505defe05174 James Hogan ^1da177e4c3f41 Linus Torvalds 1b505defe05174 James Hogan 1b505defe05174 James Hogan 5a34133167dce3 Huacai Chen 5a34133167dce3 Huacai Chen 5a34133167dce3 Huacai Chen 5a34133167dce3 Huacai Chen 5a34133167dce3 Huacai Chen 5a34133167dce3 Huacai Chen 268a2d60013049 Jiaxun Yang 5a34133167dce3 Huacai Chen 5a34133167dce3 Huacai Chen 5a34133167dce3 Huacai Chen 5a34133167dce3 Huacai Chen 5a34133167dce3 Huacai Chen 1b505defe05174 James Hogan 1b505defe05174 James Hogan 1b505defe05174 James Hogan 1b505defe05174 James Hogan ^1da177e4c3f41 Linus Torvalds e01402b115cccb Ralf Baechle e01402b115cccb Ralf Baechle e01402b115cccb Ralf Baechle e50c0a8fa60da9 Ralf Baechle 1b505defe05174 James Hogan e50c0a8fa60da9 Ralf Baechle 1b505defe05174 James Hogan 5890f70f15c52d Leonid Yegoshin 5890f70f15c52d Leonid Yegoshin 1b505defe05174 James Hogan 1b505defe05174 James Hogan 5890f70f15c52d Leonid Yegoshin 5890f70f15c52d Leonid Yegoshin 1b505defe05174 James Hogan 1b505defe05174 James Hogan e50c0a8fa60da9 Ralf Baechle e50c0a8fa60da9 Ralf Baechle 1b505defe05174 James Hogan e50c0a8fa60da9 Ralf Baechle 340ee4b98c0543 Ralf Baechle 1b505defe05174 James Hogan 340ee4b98c0543 Ralf Baechle 1b505defe05174 James Hogan e50c0a8fa60da9 Ralf Baechle fcbf1dfde3da72 David Daney fcbf1dfde3da72 David Daney fcbf1dfde3da72 David Daney e50c0a8fa60da9 Ralf Baechle e50c0a8fa60da9 Ralf Baechle 2a0b24f56c2492 Steven J. Hill e50c0a8fa60da9 Ralf Baechle 2a0b24f56c2492 Steven J. Hill e50c0a8fa60da9 Ralf Baechle 2a0b24f56c2492 Steven J. Hill e50c0a8fa60da9 Ralf Baechle 783454e2bc7ce4 Paul Burton 0510617b85758b Thomas 0510617b85758b Thomas 69f3a7de1f1ec9 Ralf Baechle 4483b159168d3d Ralf Baechle ^1da177e4c3f41 Linus Torvalds ae4ce45419f908 James Hogan
:::::: The code at :::::: e01402b115cccb6357f9
:::::: TO: Ralf Baechle :::::: CC: Ralf Baechle
---
0-DAY kernel test infrastructure Attachment: Description: application/gzip Michael Walle: "Re: [PATCH] mtd: spi-nor: Add support for w25qNNjwim" message: David Miller: "Re: [PATCH net-next v5 00/15] net: macsec: initial support for hardware offloading" sorted by: [ date ] [ thread ] [ subject ] [ author ] href="https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git">https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
f8ed9aeca6202076ecfd8
fdf90999433dd8b673012 MIPS: add support for SGI Octane (IP30)
(attached as .config)
(GCC) 7.5.0
href="https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross">https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
7505576d1c1ac0cfe85fdf90999433dd8b673012
attached .config to linux build tree
make.cross ARCH=mips
kindly add following tag
test robot <lkp@xxxxxxxxx>
prefixed by >>):
In function `trap_init':
l/traps.c:2408: undefined reference to `handle_fpe'
undefined reference to `handle_fpe'
undefined reference to `handle_fpe'
undefined reference to `handle_fpe'
undefined reference to `handle_fpe'
2006-09-11 2267
2005-04-16 2268 void __init trap_init(void)
2005-04-16 2269 {
2013-03-25 2270 extern char except_vec3_generic;
2005-04-16 2271 extern char except_vec4;
2013-03-25 2272 extern char except_vec3_r4000;
2019-04-30 2273 unsigned long i, vec_size;
2019-04-30 2274 phys_addr_t ebase_pa;
2007-11-12 2275
2007-11-12 2276 check_wait();
2005-04-16 2277
2019-04-30 2278 if (!cpu_has_mips_r2_r6) {
2019-04-30 2279 ebase = CAC_BASE;
2019-04-30 2280 ebase_pa = virt_to_phys((void *)ebase);
2019-04-30 2281 vec_size = 0x400;
2016-09-01 2282
2019-04-30 2283 memblock_reserve(ebase_pa, vec_size);
2019-04-30 2284 } else {
2019-04-30 2285 if (cpu_has_veic || cpu_has_vint)
2019-04-30 2286 vec_size = 0x200 + VECTORSPACING*64;
2019-04-30 2287 else
2019-04-30 2288 vec_size = PAGE_SIZE;
2019-04-30 2289
2019-04-30 2290 ebase_pa = memblock_phys_alloc(vec_size, 1 << fls(vec_size));
2019-04-30 2291 if (!ebase_pa)
2019-03-11 2292 panic("%s: Failed to allocate %lu bytes align=0x%x\n",
2019-04-30 2293 __func__, vec_size, 1 << fls(vec_size));
2016-09-01 2294
2016-09-01 2295 /*
2016-09-01 2296 * Try to ensure ebase resides in KSeg0 if possible.
2016-09-01 2297 *
2016-09-01 2298 * It shouldn't generally be in XKPhys on MIPS64 to avoid
2016-09-01 2299 * hitting a poorly defined exception base for Cache Errors.
2016-09-01 2300 * The allocation is likely to be in the low 512MB of physical,
2016-09-01 2301 * in which case we should be able to convert to KSeg0.
2016-09-01 2302 *
2016-09-01 2303 * EVA is special though as it allows segments to be rearranged
2016-09-01 2304 * and to become uncached during cache error handling.
2016-09-01 2305 */
2016-09-01 2306 if (!IS_ENABLED(CONFIG_EVA) && !WARN_ON(ebase_pa >= 0x20000000))
2016-09-01 2307 ebase = CKSEG0ADDR(ebase_pa);
2019-04-30 2308 else
2019-04-30 2309 ebase = (unsigned long)phys_to_virt(ebase_pa);
2016-09-01 2310 }
2005-07-14 2311
2013-06-05 2312 if (cpu_has_mmips) {
2013-06-05 2313 unsigned int config3 = read_c0_config3();
2013-06-05 2314
2013-06-05 2315 if (IS_ENABLED(CONFIG_CPU_MICROMIPS))
2013-06-05 2316 write_c0_config3(config3 | MIPS_CONF3_ISA_OE);
2013-06-05 2317 else
2013-06-05 2318 write_c0_config3(config3 & ~MIPS_CONF3_ISA_OE);
2013-06-05 2319 }
2013-06-05 2320
2011-11-16 2321 if (board_ebase_setup)
2011-11-16 2322 board_ebase_setup();
2012-05-15 2323 per_cpu_trap_init(true);
2018-11-10 2324 memblock_set_bottom_up(false);
2005-04-16 2325
2005-04-16 2326 /*
2005-04-16 2327 * Copy the generic exception handlers to their final destination.
2016-02-25 2328 * This will be overridden later as suitable for a particular
2005-04-16 2329 * configuration.
2005-04-16 2330 */
2005-07-14 2331 set_handler(0x180, &except_vec3_generic, 0x80);
2005-04-16 2332
2005-04-16 2333 /*
2005-04-16 2334 * Setup default vectors
2005-04-16 2335 */
2005-04-16 2336 for (i = 0; i <= 31; i++)
2005-04-16 2337 set_except_vector(i, handle_reserved);
2005-04-16 2338
2005-04-16 2339 /*
2005-04-16 2340 * Copy the EJTAG debug exception vector handler code to it's final
2005-04-16 2341 * destination.
2005-04-16 2342 */
2005-07-14 2343 if (cpu_has_ejtag && board_ejtag_handler_setup)
2005-07-14 2344 board_ejtag_handler_setup();
2005-04-16 2345
2005-04-16 2346 /*
2005-04-16 2347 * Only some CPUs have the watch exceptions.
2005-04-16 2348 */
2005-04-16 2349 if (cpu_has_watch)
2015-12-16 2350 set_except_vector(EXCCODE_WATCH, handle_watch);
2005-04-16 2351
2005-04-16 2352 /*
2005-07-14 2353 * Initialise interrupt handlers
2005-04-16 2354 */
2005-07-14 2355 if (cpu_has_veic || cpu_has_vint) {
2005-07-14 2356 int nvec = cpu_has_veic ? 64 : 8;
2005-07-14 2357 for (i = 0; i < nvec; i++)
2005-07-14 2358 set_vi_handler(i, NULL);
2005-07-14 2359 }
2005-07-14 2360 else if (cpu_has_divec)
2005-07-14 2361 set_handler(0x200, &except_vec4, 0x8);
2005-04-16 2362
2005-04-16 2363 /*
2005-04-16 2364 * Some CPUs can enable/disable for cache parity detection, but does
2005-04-16 2365 * it different ways.
2005-04-16 2366 */
2005-04-16 2367 parity_protection_init();
2005-04-16 2368
2005-04-16 2369 /*
2005-04-16 2370 * The Data Bus Errors / Instruction Bus Errors are signaled
2005-04-16 2371 * by external hardware. Therefore these two exceptions
2005-04-16 2372 * may have board specific handlers.
2005-04-16 2373 */
2005-04-16 2374 if (board_be_init)
2005-04-16 2375 board_be_init();
2005-04-16 2376
2015-12-16 2377 set_except_vector(EXCCODE_INT, using_rollback_handler() ?
2015-12-16 2378 rollback_handle_int : handle_int);
2015-12-16 2379 set_except_vector(EXCCODE_MOD, handle_tlbm);
2015-12-16 2380 set_except_vector(EXCCODE_TLBL, handle_tlbl);
2015-12-16 2381 set_except_vector(EXCCODE_TLBS, handle_tlbs);
2005-04-16 2382
2015-12-16 2383 set_except_vector(EXCCODE_ADEL, handle_adel);
2015-12-16 2384 set_except_vector(EXCCODE_ADES, handle_ades);
2005-04-16 2385
2015-12-16 2386 set_except_vector(EXCCODE_IBE, handle_ibe);
2015-12-16 2387 set_except_vector(EXCCODE_DBE, handle_dbe);
2005-04-16 2388
2015-12-16 2389 set_except_vector(EXCCODE_SYS, handle_sys);
2015-12-16 2390 set_except_vector(EXCCODE_BP, handle_bp);
2017-03-16 2391
2017-03-16 2392 if (rdhwr_noopt)
2017-03-16 2393 set_except_vector(EXCCODE_RI, handle_ri);
2017-03-16 2394 else {
2017-03-16 2395 if (cpu_has_vtag_icache)
2017-03-16 2396 set_except_vector(EXCCODE_RI, handle_ri_rdhwr_tlbp);
2019-10-20 2397 else if (current_cpu_type() == CPU_LOONGSON64)
2017-03-16 2398 set_except_vector(EXCCODE_RI, handle_ri_rdhwr_tlbp);
2017-03-16 2399 else
2017-03-16 2400 set_except_vector(EXCCODE_RI, handle_ri_rdhwr);
2017-03-16 2401 }
2017-03-16 2402
2015-12-16 2403 set_except_vector(EXCCODE_CPU, handle_cpu);
2015-12-16 2404 set_except_vector(EXCCODE_OV, handle_ov);
2015-12-16 2405 set_except_vector(EXCCODE_TR, handle_tr);
2015-12-16 2406 set_except_vector(EXCCODE_MSAFPE, handle_msa_fpe);
2005-04-16 2407
2005-07-14 @2408 if (board_nmi_handler_setup)
2005-07-14 2409 board_nmi_handler_setup();
2005-07-14 2410
2005-05-31 2411 if (cpu_has_fpu && !cpu_has_nofpuex)
2015-12-16 2412 set_except_vector(EXCCODE_FPE, handle_fpe);
2005-05-31 2413
2015-12-16 2414 set_except_vector(MIPS_EXCCODE_TLBPAR, handle_ftlb);
2014-07-15 2415
2014-07-15 2416 if (cpu_has_rixiex) {
2015-12-16 2417 set_except_vector(EXCCODE_TLBRI, tlb_do_page_fault_0);
2015-12-16 2418 set_except_vector(EXCCODE_TLBXI, tlb_do_page_fault_0);
2014-07-15 2419 }
2014-07-15 2420
2015-12-16 2421 set_except_vector(EXCCODE_MSADIS, handle_msa);
2015-12-16 2422 set_except_vector(EXCCODE_MDMX, handle_mdmx);
2005-05-31 2423
2005-05-31 2424 if (cpu_has_mcheck)
2015-12-16 2425 set_except_vector(EXCCODE_MCHECK, handle_mcheck);
2005-05-31 2426
2005-08-17 2427 if (cpu_has_mipsmt)
2015-12-16 2428 set_except_vector(EXCCODE_THREAD, handle_mt);
2005-08-17 2429
2015-12-16 2430 set_except_vector(EXCCODE_DSPDIS, handle_dsp);
2005-05-31 2431
2012-05-15 2432 if (board_cache_error_setup)
2012-05-15 2433 board_cache_error_setup();
2012-05-15 2434
2005-05-31 2435 if (cpu_has_vce)
2005-05-31 2436 /* Special exception: R4[04]00 uses also the divec space. */
2013-03-25 2437 set_handler(0x180, &except_vec3_r4000, 0x100);
2005-05-31 2438 else if (cpu_has_4kex)
2013-03-25 2439 set_handler(0x180, &except_vec3_generic, 0x80);
2005-05-31 2440 else
2013-03-25 2441 set_handler(0x080, &except_vec3_generic, 0x80);
2005-05-31 2442
2019-04-30 2443 local_flush_icache_range(ebase, ebase + vec_size);
Bogendoerfer 2008-08-04 2444
Bogendoerfer 2008-08-04 2445 sort_extable(__start___dbe_table, __stop___dbe_table);
2009-11-24 2446
2010-08-05 2447 cu2_notifier(default_cu2_call, 0x80000000); /* Run last */
2005-04-16 2448 }
2014-03-04 2449
line 2408 was first introduced by commit
56649487aca2c6f7fbba More AP / SP bits for the 34K, the Malta bits and things. Still wants a little polishing.
<ralf@xxxxxxxxxxxxxx>
<ralf@xxxxxxxxxxxxxx>
Open Source Technology Center
href="https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx">https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx Intel Corporation
>.config.gz

Next message: Michael Walle: "Re: [PATCH] mtd: spi-nor: Add support for w25qNNjwim"
Previous message: David Miller: "Re: [PATCH net-next v5 00/15] net: macsec: initial support for hardware offloading"
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]