Re: [PATCH v3 03/10] dt-bindings: interrupt-controller: Add Loongson IOINTC
From: Jiaxun Yang
Date: Sun Jan 12 2020 - 22:40:49 EST
ä 2020å1æ13æ GMT+08:00 äå11:44:10, Huacai Chen <chenhc@xxxxxxxxxx> åå:
>Hi, Jiaxun,
>
>On Sun, Jan 12, 2020 at 4:21 PM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
>wrote:
>>
>> Document Loongson I/O Interrupt controller.
>>
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
>> Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
>> ---
>> .../interrupt-controller/loongson,iointc.yaml | 92
>+++++++++++++++++++
>> 1 file changed, 92 insertions(+)
>> create mode 100644
>Documentation/devicetree/bindings/interrupt-controller/loongson,iointc.yaml
>>
>> diff --git
>a/Documentation/devicetree/bindings/interrupt-controller/loongson,iointc.yaml
>b/Documentation/devicetree/bindings/interrupt-controller/loongson,iointc.yaml
>> new file mode 100644
>> index 000000000000..b0fe6c551362
>> --- /dev/null
>> +++
>b/Documentation/devicetree/bindings/interrupt-controller/loongson,iointc.yaml
>> @@ -0,0 +1,92 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id:
>"http://devicetree.org/schemas/interrupt-controller/loongson,iointc.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: Loongson I/O Interrupt Controller
>> +
>> +maintainers:
>> + - Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
>> +
>> +description: |
>> + This interrupt controller is found in the Loongson-3 family of
>chips as the primary
>> + package interrupt source which can route interrupt to interrupt
>line of cores.
>> +
>> +allOf:
>> + - $ref: /schemas/interrupt-controller.yaml#
>> +
>> +properties:
>> + compatible:
>> + oneOf:
>> + - const: loongson,iointc-1.0
>> + - const: loongson,iointc-1.0a
>As our early discussion, we should use liointc for the legacy Loongson
>irq-controller ans use eiointc for the new irq-controller in
Will do, thanks.
>Loongson-3A4000. Moreover, could you please describe the difference
>between 1.0 and 1.0a?
1.0a appears in Loongson-3A4000 doesn't have LPC spurious interrupt issue.
>
>Huacai
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + interrupt-controller: true
>> +
>> + interrupts:
>> + description:
>> + Interrupt source of the CPU interrupts.
>> + minItems: 1
>> + maxItems: 4
>> +
>> + interrupt-names:
>> + description: List of names for the parent interrupts.
>> + oneOf:
>> + - items:
>> + - const: int0
>> + - const: int1
>> + - const: int2
>> + - const: int3
>> + minItems: 1
>> + maxItems: 4
>> +
>> + '#interrupt-cells':
>> + const: 2
>> +
>> + 'loongson,parent_int_map':
>> + description: |
>> + This property points the accept range of children interrupts
>> + that parents will recieve. Each cell refers to a parent
>interrupt line
>> + and each bit in the cell refers to a children interrupt. If a
>parent
>> + did not connected, than keep it's cell with zero.
>> + allOf:
>> + - $ref: /schemas/types.yaml#/definitions/uint32-array
>> + - items:
>> + minItems: 4
>> + maxItems: 4
>> +
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - interrupts
>> + - interrupt-controller
>> + - '#interrupt-cells'
>> + - 'loongson,parent_int_map'
>> +
>> +
>> +examples:
>> + - |
>> + iointc: interrupt-controller@3ff01400 {
>> + compatible = "loongson,iointc-1.0";
>> + reg = <0 0x3ff01400 0x64>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> +
>> + interrupt-parent = <&cpuintc>;
>> + interrupts = <2>, <3>;
>> + interrupt-names = "int0", "int1";
>> +
>> + loongson,parent_int_map = <0xf0ffffff>, /* int0 */
>> + <0x0f000000>, /* int1 */
>> + <0x00000000>, /* int2 */
>> + <0x00000000>; /* int3 */
>> +
>> + };
>> +
>> +...
>> --
>> 2.24.1
>>
--
Jiaxun Yang