[PATCH 4.19 146/639] ARM: dts: sun8i-a23-a33: Move NAND controller device node to sort by address
From: Greg Kroah-Hartman
Date: Fri Jan 24 2020 - 06:07:58 EST
From: Chen-Yu Tsai <wens@xxxxxxxx>
[ Upstream commit d027521497592773cd23d016d36975574d3452db ]
The NAND controller device node was inserted into the wrong position,
probably due to a rebase or merge, as the file's structure does not
provide enough context for git to accurately match the previous device
node block.
Fixes: d7b843df13ea ("ARM: dts: sun8i: add NAND controller node for A23/A33")
Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx>
Signed-off-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxx>
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
---
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 28 +++++++++++++---------------
1 file changed, 13 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index c16ffcc4db7da..a272a69519a26 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -155,6 +155,19 @@
#dma-cells = <1>;
};
+ nfc: nand@1c03000 {
+ compatible = "allwinner,sun4i-a10-nand";
+ reg = <0x01c03000 0x1000>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
+ clock-names = "ahb", "mod";
+ resets = <&ccu RST_BUS_NAND>;
+ reset-names = "ahb";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
@@ -212,21 +225,6 @@
#size-cells = <0>;
};
- nfc: nand@1c03000 {
- compatible = "allwinner,sun4i-a10-nand";
- reg = <0x01c03000 0x1000>;
- interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
- clock-names = "ahb", "mod";
- resets = <&ccu RST_BUS_NAND>;
- reset-names = "ahb";
- pinctrl-names = "default";
- pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
usb_otg: usb@1c19000 {
/* compatible gets set in SoC specific dtsi file */
reg = <0x01c19000 0x0400>;
--
2.20.1