Re: [PATCH 0/2] Add EDAC support for Kryo CPU core caches

[Sai Prakash Ranjan]

Hello James,

On 2020-01-16 00:16, James Morse wrote:
> Hi Sai,
>
> (CC: +Tyler)
>
> On 05/12/2019 09:52, Sai Prakash Ranjan wrote:
> > This series implements EDAC support for error reporting on
> > Kryo{3,4}XX CPU caches L1,L2, L3-SCU. All the cores(big.LITTLE)
> > in Kryo{3,4}XX CPUs implement RAS extensions and use interrupt
> > based ECC mechanism to report errors.
> >
> > This series has been tested on SC7180, SDM845, SM8150 SoCs with
> > Kryo{3,4}XX CPU cores based on ARM Cortex-A55, Cortex-A75 and
> > Cortex-A76.
> >
> > This implementation is platform specific in contrast to the
> > patch posted last time for generic error reporting on arm cortex
> > implementations with RAS extensions by Kyle Yan.
> >  - https://patchwork.kernel.org/patch/10161955/
>
> I think that series was dropped because it was too soc-specific and
> overlaps with the v8.2
> kernel first support. That series was superseded by:
> lore.kernel.org/r/1562086280-5351-1-git-send-email-baicar@xxxxxxxxxxxxxxxxxxxxxx
>
> Can you work with Tyler on a combined series? The combined support may
> need to look quite
> different. (DT and big/little being the obvious differences).
>
> I'm afraid this is the tip of the kernel-first-RAS iceberg.

Sorry for the delayed response. Sure, I will take a look at the series 
posted by Tyler.
It might take some time to come up with that but should be doable with 
your review :)

Thanks,
Sai

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