External email: Use caution opening links or attachmentsThanks Helen. Will add in v2.
Hi,
On 1/28/20 4:23 PM, Sowjanya Komatineni wrote:
Tegra contains VI controller which can support up to 6 MIPI CSII think it would be nice to add an example, in the Example section at the end of this file, same as other modules do.
camera sensors.
Each Tegra CSI port from CSI unit can be one-to-one mapper to
VI channel and can capture from an external camera sensor or
from built-in test pattern generator.
This patch adds dt-bindings for Tegra VI and CSI.
Signed-off-by: Sowjanya Komatineni <skomatineni@xxxxxxxxxx>
---
.../bindings/display/tegra/nvidia,tegra20-host1x.txt | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
index 9999255ac5b6..47cd6532b7d3 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
@@ -40,7 +40,7 @@ of the following host1x client modules:
Required properties:
- compatible: "nvidia,tegra<chip>-vi"
- - reg: Physical base address and length of the controller's registers.
+ - reg: Physical base address and length of the controller registers.
- interrupts: The interrupt outputs from the controller.
- clocks: Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
@@ -49,6 +49,14 @@ of the following host1x client modules:
- reset-names: Must include the following entries:
- vi
+- csi: mipi csi interface to vi
+
+ Required properties:
+ - compatible: "nvidia,tegra<chip>-csi"
+ - reg: Physical base address and length of the controller registers.
+ - clocks: Must contain entries csi, cilab, cilcd, cile clocks.
+ See ../clocks/clock-bindings.txt for details.
+
Regards,
Helen
- epp: encoder pre-processor
Required properties: