Re: [PATCH 0/5] Rewrite Motorola MMU page-table layout

From: Michael Schmitz
Date: Thu Jan 30 2020 - 14:12:33 EST


Peter,

On 30/01/20 9:16 PM, Peter Zijlstra wrote:
Hi Michael,

On Thu, Jan 30, 2020 at 08:31:13PM +1300, Michael Schmitz wrote:

Not much difference:

total used free shared buffers cached
Mem: 10712 10120 592 0 1860 2276
-/+ buffers/cache: 5984 4728
Swap: 2097144 1552 2095592


vs. vanilla 5.5rc5:
total used free shared buffers cached
Mem: 10716 10104 612 0 1588 2544
-/+ buffers/cache: 5972 4744
Swap: 2097144 1296 2095848

By sheer coincidence, the boot with your patch series happened to run a full
filesystem check on the root filesystem, so I'd say it got a good workout
re: paging and swapping (even though it's just a paltry 4 GB).
Sweet!, can I translate this into a Tested-by: from you?

If the test coverage is sufficient, you may certainly do that.

Cheers,

ÂÂÂ Michael


Haven't tried any VM stress testing yet (not sure what to do for that; it's
been years since I tried that sort of stuff).
I think, this not being SMP, doing what you just did tickled just about
everything there is.

There is one more potential issue with MMU-gather / TLB invalidate on
m68k (and a whole bunch of other archs) and I have patches for that
(although I now need to redo the m68k one.

Meanwhile the build robot gifted me with a build issue, and Will had
some nitpicks, so I'll go respin and repost these patches.