Re: [PATCH v4 2/2] dt-bindings: clk: intel: Add bindings document & header file for CGU

From: Tanwar, Rahul
Date: Wed Feb 05 2020 - 04:10:26 EST



Hi Stephen,

Thanks for taking time out to review.

On 31/1/2020 10:25 AM, Stephen Boyd wrote:
> Quoting Rahul Tanwar (2020-01-30 01:04:03)
>> Clock generation unit(CGU) is a clock controller IP of Intel's Lightning
>> Mountain(LGM) SoC. Add DT bindings include file and document for CGU clock
>> controller driver of LGM.
>>
>> Signed-off-by: Rahul Tanwar <rahul.tanwar@xxxxxxxxxxxxxxx>
>> ---
>>
>> +
>> +/* LJPLL4 */
>> +#define LGM_CLK_PCIE 45
>> +#define LGM_CLK_SATA LGM_CLK_PCIE
> What is with the aliases?

Aliases are just for code readability when more than one peripherals
share the same clock.

Regards,
Rahul