Re: [PATCH v2 1/2] dt-bindings: clock: Add binding documentation for TI syscon gate clock

From: Stephen Boyd
Date: Mon Feb 10 2020 - 13:45:49 EST


Quoting Vignesh Raghavendra (2020-02-06 20:44:24)
> diff --git a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml
> new file mode 100644
> index 000000000000..98fcac2b41f3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml
> @@ -0,0 +1,47 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/ti,am654-ehrpwm-tbclk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI syscon gate clock driver
> +
> +maintainers:
> + - Vignesh Raghavendra <vigneshr@xxxxxx>
> +
> +description: |
> +
> + This binding uses common clock bindings
> + Documentation/devicetree/bindings/clock/clock-bindings.txt

Maybe have a real description instead of this line which is mostly
useless.

> +
> +properties:
> + compatible:
> + items:

I think you can drop items.

> + - const: ti,am654-ehrpwm-tbclk
> +
> + "#clock-cells":
> + const: 1
> +
> + ti,tbclk-syscon:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle to the system controller node that has bits to
> + control eHRPWM's TBCLK
> +
> +required:
> + - compatible
> + - "#clock-cells"
> + - ti,tbclk-syscon
> +
> +examples:
> + - |
> + tbclk_ctrl: tbclk_ctrl@4140 {
> + compatible = "syscon";
> + reg = <0x4140 0x18>;
> + };
> +
> + ehrpwm_tbclk: clk0 {
> + compatible = "ti,am654-ehrpwm-tbclk";
> + #clock-cells = <1>;
> + ti,tbclk-syscon = <&tbclk_ctrl>;
> + };

I don't understand the binding. Why can't the syscon node register clks
and have #clock-cells?