[tip: perf/core] perf/x86/intel: Add Elkhart Lake support

[tip-bot2 for Kan Liang]

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     eda23b387f6c4bb2971ac7e874a09913f533b22c
Gitweb:        https://git.kernel.org/tip/eda23b387f6c4bb2971ac7e874a09913f533b22c
Author:        Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
AuthorDate:    Tue, 28 Jan 2020 10:31:17 -08:00
Committer:     Ingo Molnar <mingo@xxxxxxxxxx>
CommitterDate: Tue, 11 Feb 2020 13:17:48 +01:00

perf/x86/intel: Add Elkhart Lake support

Elkhart Lake also uses Tremont CPU. From the perspective of Intel PMU,
there is nothing changed compared with Jacobsville.
Share the perf code with Jacobsville.

Signed-off-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
Reviewed-by: Andi Kleen <ak@xxxxxxxxxxxxxxx>
Link: https://lkml.kernel.org/r/1580236279-35492-1-git-send-email-kan.liang@xxxxxxxxxxxxxxx
---
 arch/x86/events/intel/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 3be51aa..dff6623 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4765,6 +4765,7 @@ __init int intel_pmu_init(void)
 		break;
 
 	case INTEL_FAM6_ATOM_TREMONT_D:
+	case INTEL_FAM6_ATOM_TREMONT:
 		x86_pmu.late_ack = true;
 		memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
 		       sizeof(hw_cache_event_ids));