Hi,
On 06/02/2020 13:50, Hans de Goede wrote:
Hi,
On 2/6/20 12:17 PM, Roger Quadros wrote:
On TI Platforms using LPAE, SATA breaks with 64-bit DMA.
Restrict it to 32-bit.
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Roger Quadros <rogerq@xxxxxx>
---
drivers/ata/ahci_platform.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 3aab2e3d57f3..b925dc54cfa5 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -62,6 +62,9 @@ static int ahci_probe(struct platform_device *pdev)
if (of_device_is_compatible(dev->of_node, "hisilicon,hisi-ahci"))
hpriv->flags |= AHCI_HFLAG_NO_FBS | AHCI_HFLAG_NO_NCQ;
+ if (of_device_is_compatible(dev->of_node, "snps,dwc-ahci"))
+ hpriv->flags |= AHCI_HFLAG_32BIT_ONLY;
+
The "snps,dwc-ahci" is a generic (non TI specific) compatible which
is e.g. also used on some exynos devices. So using that to key the
setting of the 32 bit flag seems wrong to me.
IMHO it would be better to introduce a TI specific compatible
and use that to match on instead (and also adjust the dts files
accordingly).
Thinking further on this I think it is a bad idea to add a special
binding because the IP is not different. It is just that it is
wired differently on the TI SoC so DMA range is limited.
IMO the proper solution is to have the right dma-ranges property in the
device tree. However, SATA platform driver is doing the wrong thing
by overriding the dma masks.
i.e. in ahci_platform_init_host() in libahci_platform.c >
if (hpriv->cap & HOST_CAP_64) {
rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
if (rc) {
rc = dma_coerce_mask_and_coherent(dev,
DMA_BIT_MASK(32));
if (rc) {
dev_err(dev, "Failed to enable 64-bit DMA.\n");
return rc;
}
dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
}
}
This should be removed. Do you agree?