Right and I'd even ask a question: do we need shared MSI at all?Thanks for the advice.:)I'm not sure I get the point, but I still prefer the separate vector_sel
Actually when looking into pci, the queue_msix_vector/msix_config is the
msi vector index, which is the same as the mmio register MsiVecSel
(0x0d0).
So we don't introduce two extra registers for mapping even in sharing
mode.
What do you think?
from queue_msix_vector.
Btw, Michael propose per vq registers which could also work.
Thanks
Is it somehow better than legacy interrupt? And why?
Performance numbers please.