Re: [EXT] Re: [PATCH] bus: fsl-mc: Add ACPI support for fsl-mc

[Robin Murphy]

On 14/02/2020 3:58 pm, Pankaj Bansal wrote:
[...]
> > I don't understand what you mean. Platform MSI using IORT uses the DevID of
> > end-points. How could the ITS could work without specifying a DevID?
> > See for example how the SMMUv3 driver uses platform MSI.
>
> DevID is input ID for PCIe devices. BUT what would be the input ID for platform device? Are we saying that Platform devices can't specify an Input ID ?

No, from the IORT perspective, the input for the ID mappings belonging 
to a root complex is the PCI requester ID. The (ITS) DevID is the 
ultimate *output* of a root complex mapping.

Whilst you can indeed represent the MC as a black-box Named Component 
with an ID mapping range not using the "single mapping" flag, that means 
your input IDs come from some device-specific domain beyond the scope of 
IORT. That's why you can't easily get away from your special bus 
integration code.

> > > While, IORT spec doesn't specify any such limitation.
> > >
> > > we can easily update iort.c to remove this limitation.
> > > But, I am not sure how the input id would be passed from platform MSI
> > > GIC layer to IORT.
> > > Most obviously, the input id should be supplied by dev itself.
> >
> > Why should the device know about its own ID? That's a bus/interconnect thing.
> > And nothing should be passed *to* IORT. IORT is the source.
>
> IORT is translation between Input IDs <-> Output IDs. The Input ID is still expected to be passed to parse IORT table.

...except for single mappings, where the input ID is ignored and the 
output ID is the "source", which is exactly what iort_node_get_id() 
deals with for devices represented in IORT. With what you're talking 
about, "the device" is *not* represented in IORT, but is something 
beyond the MC 'bridge'. Now it probably is technically possible to 
handle that somehow, but it's definitely not something that the existing 
code was ever designed to anticipate.

Robin.