Re: [PATCH] MIPS: ingenic: DTS: Fix watchdog nodes
From: Philippe Mathieu-DaudÃ
Date: Sat Feb 15 2020 - 17:09:49 EST
On 2/11/20 3:53 PM, Paul Cercueil wrote:
> The devicetree ABI was broken on purpose by commit 6d532143c915
> ("watchdog: jz4740: Use regmap provided by TCU driver"), and
> commit 1d9c30745455 ("watchdog: jz4740: Use WDT clock provided
> by TCU driver"). The commit message of the latter explains why the ABI
> was broken.
>
> However, the current devicetree files were not updated to the new ABI
> described in Documentation/devicetree/bindings/timer/ingenic,tcu.txt,
> so the watchdog driver would not probe.
>
> Fix this problem by updating the watchdog nodes to comply with the new
> ABI.
>
> Fixes: 6d532143c915 ("watchdog: jz4740: Use regmap provided by TCU
> driver")
>
> Signed-off-by: Paul Cercueil <paul@xxxxxxxxxxxxxxx>
> Cc: stable@xxxxxxxxxxxxxxx
> ---
> arch/mips/boot/dts/ingenic/jz4740.dtsi | 17 +++++++++--------
> arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 +++++++++--------
> 2 files changed, 18 insertions(+), 16 deletions(-)
>
> diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
> index 5accda2767be..a3301bab9231 100644
> --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
> +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0
> #include <dt-bindings/clock/jz4740-cgu.h>
> +#include <dt-bindings/clock/ingenic,tcu.h>
>
> / {
> #address-cells = <1>;
> @@ -45,14 +46,6 @@ cgu: jz4740-cgu@10000000 {
> #clock-cells = <1>;
> };
>
> - watchdog: watchdog@10002000 {
> - compatible = "ingenic,jz4740-watchdog";
> - reg = <0x10002000 0x10>;
> -
> - clocks = <&cgu JZ4740_CLK_RTC>;
> - clock-names = "rtc";
> - };
> -
> tcu: timer@10002000 {
> compatible = "ingenic,jz4740-tcu", "simple-mfd";
> reg = <0x10002000 0x1000>;
> @@ -73,6 +66,14 @@ &cgu JZ4740_CLK_PCLK
>
> interrupt-parent = <&intc>;
> interrupts = <23 22 21>;
> +
> + watchdog: watchdog@0 {
> + compatible = "ingenic,jz4740-watchdog";
> + reg = <0x0 0xc>;
Now the WDT_TCSR register is directly managed by the CPU, OK.
Reviewed-by: Philippe Mathieu-Daudà <f4bug@xxxxxxxxx>
> +
> + clocks = <&tcu TCU_CLK_WDT>;
> + clock-names = "wdt";
> + };
> };
>
> rtc_dev: rtc@10003000 {
> diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> index f928329b034b..bb89653d16a3 100644
> --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
> +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0
> #include <dt-bindings/clock/jz4780-cgu.h>
> +#include <dt-bindings/clock/ingenic,tcu.h>
> #include <dt-bindings/dma/jz4780-dma.h>
>
> / {
> @@ -67,6 +68,14 @@ &cgu JZ4780_CLK_EXCLK
>
> interrupt-parent = <&intc>;
> interrupts = <27 26 25>;
> +
> + watchdog: watchdog@0 {
> + compatible = "ingenic,jz4780-watchdog";
> + reg = <0x0 0xc>;
> +
> + clocks = <&tcu TCU_CLK_WDT>;
> + clock-names = "wdt";
> + };
> };
>
> rtc_dev: rtc@10003000 {
> @@ -348,14 +357,6 @@ i2c4: i2c@10054000 {
> status = "disabled";
> };
>
> - watchdog: watchdog@10002000 {
> - compatible = "ingenic,jz4780-watchdog";
> - reg = <0x10002000 0x10>;
> -
> - clocks = <&cgu JZ4780_CLK_RTCLK>;
> - clock-names = "rtc";
> - };
> -
> nemc: nemc@13410000 {
> compatible = "ingenic,jz4780-nemc";
> reg = <0x13410000 0x10000>;
>