Re: [PATCH 0/2] irqchip/mmp: A pair of robustness fixed

[Rob Herring]

On Sun, Mar 8, 2020 at 9:04 AM Marc Zyngier <maz@xxxxxxxxxx> wrote:
>
> On Wed, 19 Feb 2020 09:00:22 +0100
> Lubomir Rintel <lkundrak@xxxxx> wrote:
>
> [+RobH]
>
> Lubomir,
>
> > Hi,
> >
> > please consider applying these two patches. Thery are not strictly
> > necessary, but improve diagnostics in case the DT is faulty.
>
> Can't we instead make sure our DT infrastructure checks for these? I'm
> very reluctant to add more "DT validation" to the kernel, as it feels
> like the wrong place to do this.

We don't really have a way to say a binding can only occur once or N
times in a DT. We'd have to have an SoC schema that listed out all the
nodes in the DT and forbid any additional nodes. I don't think that's
too useful as if there's only 1 instance for a given schema, then the
schema is not too useful as the schema has a equal chance of being
wrong.

Is there something inherent about the h/w that prevents more than one
instance? If support of more than one instance is a kernel limitation
(because no current SoC needs more than 1), then shouldn't the kernel
protect against this?

Rob