[PATCH v2 00/17] clk: mmp2: MMP2 CLK Update

[Lubomir Rintel]

Hi,

please consider applying this patch series, that includes fixes and
enhancements for the MMP2/MMP3 clock driver that I hope to get into 5.7.
Compared to first submission, patches 11/17 to 17/17 were added.
Details in changelogs of individual patches.

It starts off with a handful of cleanups:

  [PATCH v2 01/17] clk: mmp2: Remove a unused prototype
  [PATCH v2 02/17] clk: mmp2: Constify some strings
  [PATCH v2 03/17] dt-bindings: clock: Convert marvell,mmp2-clock to

The next patch adds the logic for calculating the rate of clock signals
coming from the PLLs dynamically. Currently they are hardcoded to more
or less wrong values (how wrong it is depends on how did firmware set
things up), which causes bad timings when they are used (e.g. to generate
display clock).

  [PATCH v2 04/17] clk: mmp2: Add support for PLL clock sources

Then MMP2 is switched over to use it:

  [PATCH v2 05/17] clk: mmp2: Stop pretending PLL outputs are constant

Switching MMP3 requires some more work, because until now, the driver
didn't distinguish between the versions of the SoC:

  [PATCH v2 06/17] dt-bindings: clock: Add MMP3 compatible string
  [PATCH v2 07/17] clk: mmp2: Check for MMP3
  [PATCH v2 08/17] dt-bindings: marvell,mmp2: Add clock ids for MMP3 PLLs
  [PATCH v2 09/17] clk: mmp2: Add PLLs that are available on MMP3
  [PATCH v2 10/17] ARM: dts: mmp3: Use the MMP3 compatible string for

Patches that follow add just add more clocks paired with DT bindings:

  [PATCH v2 11/17] dt-bindings: marvell,mmp2: Add clock ids for the GPU
  [PATCH v2 12/17] clk: mmp2: add the GPU clocks
  [PATCH v2 13/17] dt-bindings: marvell,mmp2: Add clock ids for the
  [PATCH v2 14/17] clk: mmp2: Add clocks for the thermal sensors
  [PATCH v2 15/17] dt-bindings: marvell,mmp2: Add clock id for the fifth
  [PATCH v2 16/17] clk: mmp2: Add clock for fifth SD HCI on MMP3

The last one is a straightforward bug fix, independent of the rest of the
patch set:

  [PATCH v2 17/17] clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks

The hardware vendor doesn't supply documentation, so this is best-effort
work based on the code dump from Marvell and OLPC Open Firmware.

Tested on MMP2 and MMP3 based hardware I have; details in relevant
commit messages.

Thank you,
Lubo