Re: [PATCH] MIPS: Loongson: Add model name to /proc/cpuinfo
From: Tiezhu Yang
Date: Wed Mar 11 2020 - 05:41:08 EST
On 03/11/2020 03:18 PM, YunQiang Su wrote:
Tiezhu Yang <yangtiezhu@xxxxxxxxxxx> ä2020å3æ11æåä äå2:33åéï
In the current code, when execute command "cat /proc/cpuinfo" or "lscpu",
it can not get cpu type and frequency directly because the model name is
not exist, so add it.
You patch is almost the same with the previous Huacai's.
How do you think about the copyright issue?
FYI: GPL is copyleft instead of no-copyright-exists-at-all.
I have no idea about whether Loongson has any consideration about copyright,
while it is really quite important.
Hi YunQiang & Jiaxun,
Frankly, I don't know there exists a similar patch in 2018
which has not been merged into the mainline tree, I just
want to fix the issue of model name when execute cmd
"cat /proc/cpuinfo" or "lscpu".
How to avoid and solve this case?
Add a proper label in the patch?
Thanks,
Tiezhu Yang
E.g. without this patch:
[loongson@localhost ~]$ lscpu
Architecture: mips64
Byte Order: Little Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Thread(s) per core: 1
Core(s) per socket: 4
Socket(s): 1
NUMA node(s): 1
L1d cache: 64K
L1i cache: 64K
L2 cache: 2048K
NUMA node0 CPU(s): 0-3
With this patch:
[loongson@localhost ~]$ lscpu
Architecture: mips64
Byte Order: Little Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Thread(s) per core: 1
Core(s) per socket: 4
Socket(s): 1
NUMA node(s): 1
Model name: Loongson-3A R3 (Loongson-3A3000) @ 1449MHz
L1d cache: 64K
L1i cache: 64K
L2 cache: 2048K
NUMA node0 CPU(s): 0-3
Signed-off-by: Tiezhu Yang <yangtiezhu@xxxxxxxxxxx>
---
arch/mips/include/asm/cpu-info.h | 1 +
arch/mips/kernel/cpu-probe.c | 27 +++++++++++++++++++++++----
arch/mips/kernel/proc.c | 4 ++++
3 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index ed7ffe4..50e924e 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -115,6 +115,7 @@ extern struct cpuinfo_mips cpu_data[];
extern void cpu_probe(void);
extern void cpu_report(void);
+extern const char *__model_name[];
extern const char *__cpu_name[];
#define cpu_name_string() __cpu_name[raw_smp_processor_id()]
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 6ab6b03..3ae40cc 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1548,6 +1548,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
set_elf_platform(cpu, "loongson2e");
set_isa(c, MIPS_CPU_ISA_III);
c->fpu_msk31 |= FPU_CSR_CONDX;
+ __model_name[cpu] = "Loongson-2E";
break;
case PRID_REV_LOONGSON2F:
c->cputype = CPU_LOONGSON2EF;
@@ -1555,23 +1556,37 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
set_elf_platform(cpu, "loongson2f");
set_isa(c, MIPS_CPU_ISA_III);
c->fpu_msk31 |= FPU_CSR_CONDX;
+ __model_name[cpu] = "Loongson-2F";
break;
case PRID_REV_LOONGSON3A_R1:
c->cputype = CPU_LOONGSON64;
__cpu_name[cpu] = "ICT Loongson-3";
set_elf_platform(cpu, "loongson3a");
set_isa(c, MIPS_CPU_ISA_M64R1);
- c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
- MIPS_ASE_LOONGSON_EXT);
+ c->ases |= (MIPS_ASE_LOONGSON_MMI |
+ MIPS_ASE_LOONGSON_CAM |
+ MIPS_ASE_LOONGSON_EXT);
+ __model_name[cpu] = "Loongson-3A R1 (Loongson-3A1000)";
break;
case PRID_REV_LOONGSON3B_R1:
+ c->cputype = CPU_LOONGSON64;
+ __cpu_name[cpu] = "ICT Loongson-3";
+ set_elf_platform(cpu, "loongson3b");
+ set_isa(c, MIPS_CPU_ISA_M64R1);
+ c->ases |= (MIPS_ASE_LOONGSON_MMI |
+ MIPS_ASE_LOONGSON_CAM |
+ MIPS_ASE_LOONGSON_EXT);
+ __model_name[cpu] = "Loongson-3B R1 (Loongson-3B1000)";
+ break;
case PRID_REV_LOONGSON3B_R2:
c->cputype = CPU_LOONGSON64;
__cpu_name[cpu] = "ICT Loongson-3";
set_elf_platform(cpu, "loongson3b");
set_isa(c, MIPS_CPU_ISA_M64R1);
- c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
- MIPS_ASE_LOONGSON_EXT);
+ c->ases |= (MIPS_ASE_LOONGSON_MMI |
+ MIPS_ASE_LOONGSON_CAM |
+ MIPS_ASE_LOONGSON_EXT);
+ __model_name[cpu] = "Loongson-3B R2 (Loongson-3B1500)";
break;
}
@@ -1926,6 +1941,7 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
__cpu_name[cpu] = "ICT Loongson-3";
set_elf_platform(cpu, "loongson3a");
set_isa(c, MIPS_CPU_ISA_M64R2);
+ __model_name[cpu] = "Loongson-3A R2 (Loongson-3A2000)";
break;
case PRID_REV_LOONGSON3A_R3_0:
case PRID_REV_LOONGSON3A_R3_1:
@@ -1933,6 +1949,7 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
__cpu_name[cpu] = "ICT Loongson-3";
set_elf_platform(cpu, "loongson3a");
set_isa(c, MIPS_CPU_ISA_M64R2);
+ __model_name[cpu] = "Loongson-3A R3 (Loongson-3A3000)";
break;
}
@@ -1952,6 +1969,7 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
c->writecombine = _CACHE_UNCACHED_ACCELERATED;
c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
+ __model_name[cpu] = "Loongson-3A R4 (Loongson-3A4000)";
break;
default:
panic("Unknown Loongson Processor ID!");
@@ -2111,6 +2129,7 @@ u64 __ua_limit;
EXPORT_SYMBOL(__ua_limit);
#endif
+const char *__model_name[NR_CPUS];
const char *__cpu_name[NR_CPUS];
const char *__elf_platform;
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index f8d3671..5fc74e6 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -15,6 +15,7 @@
#include <asm/mipsregs.h>
#include <asm/processor.h>
#include <asm/prom.h>
+#include <asm/time.h>
unsigned int vced_count, vcei_count;
@@ -63,6 +64,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, fmt, __cpu_name[n],
(version >> 4) & 0x0f, version & 0x0f,
(fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
+ if (__model_name[n])
+ seq_printf(m, "model name\t\t: %s @ %uMHz\n",
+ __model_name[n], mips_hpt_frequency / 500000);
seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
cpu_data[n].udelay_val / (500000/HZ),
(cpu_data[n].udelay_val / (5000/HZ)) % 100);
--
2.1.0