Re: [RFC PATCH v1 0/3] arm64: tlb: add support for TTL field
From: yezhenyu (A)
Date: Wed Mar 11 2020 - 07:29:54 EST
Hi Marc,
On 2020/3/11 17:12, Marc Zyngier wrote:
> Zhenyu,
>
> On 2020-03-11 02:53, Zhenyu Ye wrote:
>> ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate
>> the level of translation table walk holding the leaf entry for the
>> address that is being invalidated. Hardware can use this information
>> to determine if there was a risk of splintering.
>>
>> This set of patches adds TTL field to __TLBI_ADDR, and uses
>> Architecture-specific MM context to pass the TTL value to tlb interface.
>>
>> The default value of TTL is 0, which will not have any impact on the
>> TLB maintenance instructions. The last patch trys to use TTL field in
>> some obviously tlb-flush interface.
>
> I have already posted some support for ARMv8.4-TTL as part of my NV series [1],
> patches 62, 67, 68 and 69. This only deals with Stage-2 translation so far.
> If you intend to add Stage-1, please build on top of what I have already posted
> (I can extract the patches on a separate branch if you want).
>
> Thanks,
>
> ÂÂÂÂÂÂÂ M.
>
> [1] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-1-maz@xxxxxxxxxx/
I just readed your code changes to TTL. You pass the TTL value by changing the
function interface, which only involves the ARM and ARM64 architectures in Stage-2
translation.
However, in Stage-1, many common interfaces(such as flush_tlb_range) need to be
modified, which involves very much architectures. So I try to use MM context in
mm_struct to pass the TTL value.
I will send patch v2 based on top of your kvm-arm64/nv-5.6-rc1 branch soon.
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-5.6-rc1
Thanks,
Zhenyu