Re: [PATCH v5 01/23] irqchip/gic-v3: Use SGIs without active state if offered

[Marc Zyngier]

Hi Zenghui,

On 2020-03-12 06:30, Zenghui Yu wrote:
> Hi Marc,
>
> On 2020/3/5 4:33, Marc Zyngier wrote:
> > To allow the direct injection of SGIs into a guest, the GICv4.1
> > architecture has to sacrifice the Active state so that SGIs look
> > a lot like LPIs (they are injected by the same mechanism).
> >
> > In order not to break existing software, the architecture gives
> > offers guests OSs the choice: SGIs with or without an active
> > state. It is the hypervisors duty to honor the guest's choice.
> >
> > For this, the architecture offers a discovery bit indicating whether
> > the GIC supports GICv4.1 SGIs (GICD_TYPER2.nASSGIcap), and another
> > bit indicating whether the guest wants Active-less SGIs or not
> > (controlled by GICD_CTLR.nASSGIreq).
>
> I still can't find the description of these two bits in IHI0069F.
> Are they actually architected and will be available in the future
> version of the spec?  I want to confirm it again since this has a
> great impact on the KVM code, any pointers?

Damn. The bits *are* in the engineering spec version 19 (unfortunately
not a public document, but I believe you should have access to it).

If the bits have effectively been removed from the spec, I'll drop the
GICv4.1 code from the 5.7 queue until we find a way to achieve the same
level of support.

I've emailed people inside ARM to find out.

Thanks,

        M.
--
Jazz is not dead. It just smells funny...