Re: [PATCH] clk: socfpga: stratix10: use new parent data scheme
From: Stephen Boyd
Date: Mon Mar 16 2020 - 12:01:13 EST
Quoting Dinh Nguyen (2020-03-09 22:55:27)
>
>
> On 3/9/20 5:27 PM, Stephen Boyd wrote:
> > Quoting Dinh Nguyen (2020-02-28 12:36:11)
> >> +
> >> +static const struct clk_parent_data mpu_free_mux[] = {
> >> + { .name = "main_mpu_base_clk", },
> >> + { .name = "peri_mpu_base_clk", },
> >> + { .name = "osc1", },
> >> + { .name = "cb-intosc-hs-div2-clk", },
> >> + { .name = "f2s-free-clk", },
> >> +};
> >
> > While this changes everything to use the new way it doesn't actually
> > migrate anything over to using direct pointers or the .fw_name field.
> > What's going on?
> >
>
> Sorry about that. I am using direct pointers to the new parent data here:
>
> in drivers/clk/socfpga/clk-periph-s10.c
>
> - init.parent_names = parent_names;
> + init.parent_names = NULL;
> + init.parent_data = clks->parent_data;
>
> The driver seems to work fine without having to add .fw_name.
>
Yes, .fw_name would only be needed if the parent clks were external to
the clk controller. Furthermore if they are only clk_hw pointers then we
can use .parent_hws instead.