[PATCH v10 11/12] clk: pwm: Assign u64 divisor to unsigned int before use
From: Guru Das Srinagesh
Date: Thu Mar 19 2020 - 16:50:35 EST
Since the PWM framework is switching struct pwm_args.period's datatype
to u64, prepare for this transition by assigning the 64-bit divisor to
an unsigned int variable to use as the divisor. This is being done
because the divisor is a 32-bit constant and the quotient will be zero
if the divisor exceeds 2^32.
Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
Cc: Stephen Boyd <sboyd@xxxxxxxxxx>
Cc: linux-clk@xxxxxxxxxxxxxxx
Cc: David Laight <David.Laight@xxxxxxxxxx>
Reported-by: kbuild test robot <lkp@xxxxxxxxx>
Signed-off-by: Guru Das Srinagesh <gurus@xxxxxxxxxxxxxx>
---
drivers/clk/clk-pwm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-pwm.c b/drivers/clk/clk-pwm.c
index 87fe0b0e..c0b5da3 100644
--- a/drivers/clk/clk-pwm.c
+++ b/drivers/clk/clk-pwm.c
@@ -72,6 +72,7 @@ static int clk_pwm_probe(struct platform_device *pdev)
struct pwm_device *pwm;
struct pwm_args pargs;
const char *clk_name;
+ unsigned int period;
int ret;
clk_pwm = devm_kzalloc(&pdev->dev, sizeof(*clk_pwm), GFP_KERNEL);
@@ -88,8 +89,9 @@ static int clk_pwm_probe(struct platform_device *pdev)
return -EINVAL;
}
+ period = pargs.period;
if (of_property_read_u32(node, "clock-frequency", &clk_pwm->fixed_rate))
- clk_pwm->fixed_rate = NSEC_PER_SEC / pargs.period;
+ clk_pwm->fixed_rate = NSEC_PER_SEC / period;
if (pargs.period != NSEC_PER_SEC / clk_pwm->fixed_rate &&
pargs.period != DIV_ROUND_UP(NSEC_PER_SEC, clk_pwm->fixed_rate)) {
--
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