[PATCH 06/10] ARM: dts: mmp*: Make the serial ports compatible with xscale-uart

[Lubomir Rintel]

XScale serial port driver is perfectly capable of supporting this hardware. A
separate compatible string is probably a historical mess.

Signed-off-by: Lubomir Rintel <lkundrak@xxxxx>
---
 arch/arm/boot/dts/mmp2.dtsi | 8 ++++----
 arch/arm/boot/dts/mmp3.dtsi | 8 ++++----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index 45372df0ec2ad..da10567b5aca6 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -209,7 +209,7 @@ timer0: timer@d4014000 {
 			};
 
 			uart1: serial@d4030000 {
-				compatible = "mrvl,mmp-uart";
+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
 				reg = <0xd4030000 0x1000>;
 				interrupts = <27>;
 				clocks = <&soc_clocks MMP2_CLK_UART0>;
@@ -219,7 +219,7 @@ uart1: serial@d4030000 {
 			};
 
 			uart2: serial@d4017000 {
-				compatible = "mrvl,mmp-uart";
+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
 				reg = <0xd4017000 0x1000>;
 				interrupts = <28>;
 				clocks = <&soc_clocks MMP2_CLK_UART1>;
@@ -229,7 +229,7 @@ uart2: serial@d4017000 {
 			};
 
 			uart3: serial@d4018000 {
-				compatible = "mrvl,mmp-uart";
+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
 				reg = <0xd4018000 0x1000>;
 				interrupts = <24>;
 				clocks = <&soc_clocks MMP2_CLK_UART2>;
@@ -239,7 +239,7 @@ uart3: serial@d4018000 {
 			};
 
 			uart4: serial@d4016000 {
-				compatible = "mrvl,mmp-uart";
+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
 				reg = <0xd4016000 0x1000>;
 				interrupts = <46>;
 				clocks = <&soc_clocks MMP2_CLK_UART3>;
diff --git a/arch/arm/boot/dts/mmp3.dtsi b/arch/arm/boot/dts/mmp3.dtsi
index 7a5b9962497e4..9b5087a95e736 100644
--- a/arch/arm/boot/dts/mmp3.dtsi
+++ b/arch/arm/boot/dts/mmp3.dtsi
@@ -319,7 +319,7 @@ timer: timer@d4014000 {
 			};
 
 			uart1: serial@d4030000 {
-				compatible = "mrvl,mmp-uart";
+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
 				reg = <0xd4030000 0x1000>;
 				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&soc_clocks MMP2_CLK_UART0>;
@@ -329,7 +329,7 @@ uart1: serial@d4030000 {
 			};
 
 			uart2: serial@d4017000 {
-				compatible = "mrvl,mmp-uart";
+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
 				reg = <0xd4017000 0x1000>;
 				interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&soc_clocks MMP2_CLK_UART1>;
@@ -339,7 +339,7 @@ uart2: serial@d4017000 {
 			};
 
 			uart3: serial@d4018000 {
-				compatible = "mrvl,mmp-uart";
+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
 				reg = <0xd4018000 0x1000>;
 				interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&soc_clocks MMP2_CLK_UART2>;
@@ -349,7 +349,7 @@ uart3: serial@d4018000 {
 			};
 
 			uart4: serial@d4016000 {
-				compatible = "mrvl,mmp-uart";
+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
 				reg = <0xd4016000 0x1000>;
 				interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&soc_clocks MMP2_CLK_UART3>;
-- 
2.25.1