RE: [PATCH v6 2/2] tty: samsung_tty: 32-bit access for TX/RX hold registers
From: Hyunki Koo
Date: Tue Apr 07 2020 - 02:03:02 EST
On 07. 04. 20, 1:49, Jiri Slaby wrote:
> On 07. 04. 20, 1:08, Hyunki Koo wrote:
> > Support 32-bit access for the TX/RX hold registers UTXH and URXH.
> >
> > This is required for some newer SoCs.
> >
> > Signed-off-by: Hyunki Koo <hyunki00.koo@xxxxxxxxxxx>
> ...
> > ---
> > drivers/tty/serial/samsung_tty.c | 76
> > +++++++++++++++++++++++++++++++++-------
> > 1 file changed, 64 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/tty/serial/samsung_tty.c
> > b/drivers/tty/serial/samsung_tty.c
> > index 73f951d65b93..bdf1d4d12cb1 100644
> > --- a/drivers/tty/serial/samsung_tty.c
> > +++ b/drivers/tty/serial/samsung_tty.c
> > @@ -154,12 +154,47 @@ struct s3c24xx_uart_port {
> ...
> > -#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port,
> > reg))
> > +static void wr_reg(struct uart_port *port, u32 reg, u32 val) {
> > + switch (port->iotype) {
> > + case UPIO_MEM:
> > + writeb_relaxed(val, portaddr(port, reg));
> > + break;
> > + case UPIO_MEM32:
> > + writel_relaxed(val, portaddr(port, reg));
> > + break;
> > + }
> > +}
> > +
> > #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port,
> > reg))
> >
> > +static void wr_reg_barrier(struct uart_port *port, u32 reg, u32 val)
>
> You need to explain, why you need this _barrier variant now. This change
> should be done in a separate patch too.
>
> > +{
> > + switch (port->iotype) {
> > + case UPIO_MEM:
> > + writeb(val, portaddr(port, reg));
> > + break;
> > + case UPIO_MEM32:
> > + writel(val, portaddr(port, reg));
> > + break;
> > + }
> > +}
> > +
> > /* Byte-order aware bit setting/clearing functions. */
> >
> > static inline void s3c24xx_set_bit(struct uart_port *port, int idx,
>
> thanks,
> --
> js
> suse labs
The purpose of this patch is to support 32bit access for registers, and it is also working exsisting device.
There are 3 operations what I have to to change which are rd_regb, wr_regb, and writeb.
rd_regb, wr_regb are changed to rd_reg, wr_reg.
and writeb is changed to wr_reg_barrier.
So I make as a one patch.
wr_reg_barrier is not a different patch, itis just replaced from writeb.